Check patentability & draft patents in minutes with Patsnap Eureka AI!

Upgrading method of fpga based on pcie interface

A technology for upgrading commands and connection status, applied in the field of communication, which can solve problems such as business impact, and the host is prone to downtime or restart.

Active Publication Date: 2022-04-12
HUAWEI TECH CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] This application provides an FPGA upgrade method, FPGA board, host and electronic equipment, which are used to alleviate the problem that the host is prone to downtime or restart during the FPGA upgrade process in the prior art, thereby affecting the business.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Upgrading method of fpga based on pcie interface
  • Upgrading method of fpga based on pcie interface
  • Upgrading method of fpga based on pcie interface

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0058] This embodiment introduces an FPGA upgrade method based on an application scenario where an FPGA board is connected to a host through a PCIe slot. see Figure 5 , which is a structural block diagram of the application scenario of this embodiment, based on Figure 5 , the execution process of the host side and the FPGA board side will be introduced in detail below.

[0059] see Figure 6 , is a flow chart of the host side, and each method step in the process can be specifically executed by a processor (such as a CPU) in the host by reading instructions in the memory in a software manner, and the software can be a production FPGA board Provided by the manufacturer, it is used to provide an upgrade program for upgrading the FPGA board. The upgrade program can be a third-party application program (that is, an application program that is not included with the operating system, but is installed after the operating system is installed) , of course, may also be a program tha...

Embodiment 2

[0120] Based on the above embodiments, this embodiment discloses another FPGA upgrade method, see Figure 9 , which is a hardware architecture diagram based on this embodiment. The difference between this embodiment and the first embodiment is that the FPGA and the host may not judge the state of each other by detecting the change of the PCIe link state, but interact through reserved physical pins. Among them, there may be two reserved pins, one of which is used for communication from the host to the FPGA; the other is used for communication from the FPGA to the host. The reserved pin can also be a pin capable of two-way communication. The pin can be used by time-division multiplexing, that is, it is used for communication from the host to the FPGA at a certain time, and used for communication at another time. Communication from the FPGA to the host. The following process is described based on the situation of two pins.

[0121] Some steps in this embodiment are similar to ...

Embodiment 3

[0147] Based on the second embodiment, this embodiment provides another FPGA upgrade method. In this embodiment, S102 in the second embodiment may be executed first, then S104 is executed, and then S103 is executed. Correspondingly, in this case, the FPGA does not need to wait for a preset time, but can directly start the upgrade.

[0148] The specific implementation methods of the host computer and the FPGA are introduced respectively below.

[0149] see Figure 12 , is a flow chart of processing on the host side, and each step is executed by the host, including:

[0150] S121. Load new configuration data into the FPGA configuration memory.

[0151]S122. Suspend one or more application programs that use the PCIe link to access the FPGA, and save the scene.

[0152] S123. Uninstall the PCIe driver corresponding to the FPGA.

[0153] S124. Send an upgrade instruction to the FPGA.

[0154] At this time, because the PCIe driver is uninstalled, the upgrade command cannot be s...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A method for upgrading an FPGA, comprising: a host sends an upgrade command to the FPGA; the host unloads a PCIe driver corresponding to the FPGA so that the state of the PCIe link becomes the disconnected state; Whether the state of continuous detection described PCIe link becomes connected state in one overtime; If yes, then reload described PCIe driver; Described method also comprises: described FPGA is after receiving described upgrade instruction, The FPGA continues to detect whether the state of the PCIe link becomes a disconnected state within the second timeout period, wherein the disconnected state is that the PCIe link completes the PCIe driver corresponding to the FPGA after the host unloads state after the program; if yes, the FPGA loads the configuration data from the FPGA configuration memory to upgrade; after the upgrade is completed, the FPGA negotiates with the host to restore the state of the PCIe link to Used to reload the connection state of the PCIe driver after being detected by the host.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to an FPGA upgrading method based on a PCIe interface. Background technique [0002] Because FPGA (Field Programmable Logic Gate Array) has the characteristics of strong processing capacity, convenient use and reconfigurability, it plays an important role similar to coprocessor in more and more business scenarios (such as on servers). Role. Based on the consideration of versatility, when the FPGA is used as a coprocessor to accelerate the data of the host, most of them are connected to the host in the form of a standard PCIe interface card. For example, see figure 1 , which is a schematic diagram of the structure of a PCIe interface card connected to a host in a server, figure 1 The FPGA board 1, the FPGA board 2, the graphics processing card, and the solid-state hard disk in the board can all be PCIe interface cards, and are connected to the host computer through the PCIe ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F8/65G06F13/42
CPCG06F8/65G06F13/4282G06F8/62G06F9/44505G06F11/3027G06F11/3055G06F11/349G06F2213/0026
Inventor 相剑波张波
Owner HUAWEI TECH CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com