Preparation method of heterogeneous bonding structure

A heterogeneous bonding and bonding technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of large wafer thickness, affecting the lithography accuracy of device structure, and inability to apply

Active Publication Date: 2020-07-07
上海新硅聚合半导体有限公司
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Problems solved by technology

However, due to the large thickness of the wafer used for wafer bonding (generally greater than 200 microns) and the mismatch of thermal expansion coefficients between the heterogeneous materials, the pre-bonded heterogeneous bonded structure will be relatively weak during high temperature annealing. Large thermal stress leads to deformation of the bonding structure
After the bonded structure is cooled to room temperature, the thermal stress generated by post-high temperature annealing cannot be completely released, so there is residual thermal stress inside the heterogeneous

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  • Preparation method of heterogeneous bonding structure
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[0042] The following describes the implementation of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0043] See Figure 2 to Figure 6 . It should be noted that the illustrations provided in this embodiment only illustrate the basic idea of ​​the present invention in a schematic manner, although the illustrations only show the components related to the present invention instead of the actual implementation of the number, shape and For size drawing, the shape, quantity, and proportion of each component can be changed at will during actual imp...

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Abstract

The invention provides a preparation method of a heterogeneous bonding structure, which comprises the steps of providing a first substrate and a second substrate, wherein the first substrate is provided with a first bonding surface, the second substrate is provided with a second bonding surface, and the first bonding surface and the second bonding surface are subjected to bonding treatment at a bonding temperature; conducting annealing treatment at an annealing treatment temperature; carrying out cooling treatment to reduce the temperature to a first temperature which is lower than the bondingtemperature; and adjusting the temperature of the structure obtained in the previous step to room temperature so as to obtain a heterogeneous bonding structure formed by the treated first substrate and second substrate. According to the preparation method of the heterogeneous bonding structure, the reinforced structure is cooled to a temperature below the bonding temperature after annealing treatment reinforcement, so that thermal stress opposite to that in the heating process is generated in the cooling treatment process, residual thermal stress in the heterogeneous bonding structure is reduced, and warping of the bonding structure caused by stress can be reduced.

Description

technical field [0001] The invention belongs to the technical field of substrate preparation, in particular to a method for preparing a heterogeneous bonding structure. Background technique [0002] With the development of electronic information technology, devices with a single function have been unable to meet people's needs for device miniaturization and functional diversification. Therefore, the heterogeneous integration of materials or devices with different functions to develop multifunctional integrated electronic modules has become the development direction of electronic technology. For example, NGAS in the United States uses heterogeneous integration technology to integrate InP devices, GaN devices and Si-CMOS devices. Raytheon Corporation of the United States uses heteroepitaxy technology to integrate InP devices with silicon devices. [0003] At present, there are mainly two solutions for heterogeneous integration of different functional materials: heteroepitaxy...

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Application Information

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IPC IPC(8): H01L21/18H01L21/02
CPCH01L21/02H01L21/187
Inventor 欧欣黄凯李文琴赵晓蒙鄢有泉李忠旭王曦
Owner 上海新硅聚合半导体有限公司
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