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Narrow pulse generation circuit with adjustable parameters

A technology for generating circuits and narrow pulses, applied in the field of narrow pulse generating circuits, can solve the problems of complex circuits, difficult pulse adjustment, poor stability, etc., and achieve the effects of easy popularization and application, convenient pulse width adjustment, and simple production.

Pending Publication Date: 2020-07-10
NO 34 RES INST OF CHINA ELECTRONICS TECH GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its pulse adjustment is difficult, and different pulse parameters need to be configured with different resistance and capacitance values.
[0006] Obviously, the pulse signal generation circuits of the above two existing methods have disadvantages such as difficult adjustment of pulse parameters, complex circuits, and poor stability.

Method used

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  • Narrow pulse generation circuit with adjustable parameters

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Embodiment Construction

[0017] The embodiment of the narrow pulse generation circuit with adjustable parameters is for example figure 1 As shown, it includes a crystal oscillator, a complex programmable logic device CPLD, a programmable delay chip and a D-type flip-flop. In this example, a crystal oscillator with a frequency of 5 MHz is used. The crystal oscillator is connected to the CPLD to provide a standard clock; the CPLD generates a square wave pulse signal, which is divided into two channels and enters two programmable delay chips respectively, and the CPLD delay setting signal is connected to the delay of the first programmable delay chip amount setting pin D, the first programmable delay chip sets the delay amount as T 1 , the second programmable delay chip sets the delay amount to 0, and the delayed signals of the first programmable delay chip and the second programmable delay chip are respectively connected to RESET (reset) and CLK of the D-type flip-flop (Clock) pin, the D-type flip-flop...

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Abstract

The invention relates to a narrow pulse generation circuit with adjustable parameters. The circuit comprises a complex programmable logic device (CPLD), programmable time delay chips and a trigger. Asquare wave pulse signal generated by the CPLD connected with a crystal oscillator is divided into two parts to enter the two programmable delay chips respectively; a delay setting signal of the CPLDis input into 11 delay setting pins of a first programmable delay chip, the delay of a second programmable delay chip is set to be 0, signals delayed by the two delay chips are respectively input intoRESET and CLK pins of a D-type trigger, and the D-type trigger outputs a narrow pulse signal. The CPLD may be replaced by an FPGA. The invention has the advantages that: the pulse width of the required narrow pulse can be set by setting the difference between the delay amounts of the two delay chips, and pulse parameters are convenient to adjust; the circuit is not limited by the inherent time delay of a time delay chip, can generate a pulse signal with the minimum of 330ps, is simple, and is easy to implement and popularize.

Description

technical field [0001] The invention relates to the technical field of pulse circuits, in particular to a parameter-adjustable narrow pulse generating circuit. Background technique [0002] The narrow pulse electric signal generating circuit is an important part of the narrow pulse driving circuit of the semiconductor laser. With the development of semiconductor technology, many integrated chips suitable for pulse driving of semiconductor lasers have appeared. These driving chips generate different laser modulation currents according to different pulse input signals. Therefore, one of the keys to the design of the semiconductor laser pulse drive circuit is the design of the pulse electrical signal generation circuit. [0003] At present, there are two main methods of generating electrical pulse signals: [0004] 1. Use the analog characteristics of tunnel diodes, avalanche diodes and step diodes to generate electric pulses; the amplitude of electric pulse signals generated...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K3/335
CPCH03K3/335
Inventor 覃良标鲁正付益陈昉
Owner NO 34 RES INST OF CHINA ELECTRONICS TECH GRP