493 results about "Pulse circuits" patented technology

A system for dehydrating lubricating and hydraulic fluids includes a heating circuit and circuitry for creating a vacuum. The heating circuitry introduces a stream of heated fluid into a vacuum chamber in which a partial vacuum is drawn by the vacuum circuit. Aqueous components of the fluid stream are flashed in the vacuum chamber by virtue of the elevated temperature and reduced pressure. Dehydrated fluid is then collected and evacuated from the vacuum chamber. Vapor from the vacuum chamber, including the aqueous components of the fluid stream are collected, condensed and separately evacuated. The heating circuit limits surface temperature of a heating element in a closed-loop manner to avoid degradation of the fluid. The fluid stream is introduced into the vacuum chamber or is recirculated through the heating circuit to maintain a desired level of fluid temperature in a closed-loop manner. The system includes circuits for evacuating dehydrated fluid in a closed-loop manner and for automatically discharging condensate. The technique avoids undesirable foaming of dehydrated fluid within the vacuum chamber. A vacuum pulsing circuit is provided for periodically pulsing vacuum pressure within the vacuum chamber to aid in flashing aqueous components from the heated fluid stream.

There is provided by this invention novel magnetron sputtering apparatus that is generally comprised of a pulsed dc power supply capable of delivering peak powers of 0.1 megaWatts to several megaWatts with a peak power density greater than 1 kW/cm2. The power supply has a pulsing circuit comprised of an energy storage capacitor and serially connected inductor with a switching means for disconnecting the pulsing circuit from the plasma and recycling the inductor energy back to the energy storage capacitor at the detection of an arc condition. The energy storage capacitor and the serially connected inductor provide an impedance match to the plasma, limits the current rate of rise and peak magnitude in the event of an arc, and shapes the voltage pulses to the plasma.

A pulse circuit to solve a system of differential equations in the pulse domain based on analog or inputs or time-encoded pulse inputs. Intrinsically linear 1-bit digital to analog converters are used as feedback elements within circuits implementing solutions to a differential equation or to a system of differential equations. The circuits may be used to implement filters. While the input to the circuit may be an analog signal, the internal signals of the circuit are time-encoded current or voltage pulses. Output of the circuit is a time-encoded pulse or a series of time-encoded pulses from which an analog output may be recovered by time decoding.

A system is presented. The system includes a micro-electromechanical system switch. Further, the system includes a balanced diode bridge configured to suppress arc formation between contacts of the micro-electromechanical system switch. A pulse circuit is coupled to the balanced diode bridge to form a pulse signal in response to a fault condition. An energy-absorbing circuitry is coupled in a parallel circuit with the pulse circuit and is adapted to absorb electrical energy resulting from the fault condition without affecting a pulse signal formation by the pulse circuit.

A hybrid power converter includes a primary switching circuit, an LC circuit, and a secondary switching circuit. The primary switching circuit includes three or more switching transistors in series that may turn on or off according to a switching cycle to generate a series of voltage pulses at a connecting node between two switching transistors. The LC circuit may be coupled via the to the secondary switching circuits to the connecting node of the primary switching circuit. The LC circuit may receive, from the primary switching circuit, a series of pulses via the secondary switching circuits and may generate an inductor current in the LC circuit. The inductor current may charge a capacitor of the LC circuit to generate an output voltage of the hybrid power converter. The output voltage may have a reverse polarity with respect to an input voltage that may be coupled to the primary switching circuit.

The invention discloses a medical B-ultrasound front-end excitation device, comprising a FPGA-based transmitted beam main control unit, a multi-channel high-voltage switch circuit, a level conversion and high-voltage driving pulse circuit, a high-voltage excitation generating circuit, an isolation diode bridge and the control signal circuit thereof. In the invention, an apodization bipolar transmission circuit is adopted, thereby overcoming the characteristics of the beam and the limitation of the spectrum transmitted by the traditional B-ultrasound front-end system which uses unipolar high-voltage pulse. By using a energy distribution apodization excitation technology which is near Gaussian shape, the characteristics and side lobe suppression of the transmitted beam are effectively improved; thereby not only improving the utilization of transmission energy, but also effectively improving the detection penetration when the transmission high-pressure is unchanged. The excitation device can obtain obvious variable frequency effect, and improve the image resolution, so that the image is more uniform and finer, and the overall performance of the system is enhanced.

The invention belongs to the technical field of massaging equipment, and particularly relates to a neck protecting instrument. The neck protecting instrument comprises an elastic housing, electrode piece massaging heads and handles, wherein the elastic housing comprises an elastic surface shell, a silica gel bottom shell and a microprocessor circuit; the silica gel bottom shell is clamped to the back surface of the elastic surface shell; the microprocessor circuit is located between the elastic surface shell and the silica gel bottom shell; the microprocessor circuit comprises a master controlchip and a pulse circuit; the master control chip is connected with the pulse circuit; mounting protrusion platforms are arranged at the back surface of the silica gel bottom shell; each electrode piece massaging head comprises a fixed block, a bracket and an electrode piece; each fixed block is located on one side of the front surface of the corresponding mounting protrusion platform; one end ofeach bracket penetrates through the corresponding mounting protrusion platform to be connected with the corresponding fixed block; the other end of each bracket is connected with the corresponding electrode piece; the electrode pieces are connected with the pulse circuit; the elastic housing is connected with the handles through connecting pieces; and the electrode piece massaging heads are integrally connected with the silica gel bottom shell through the mounting protrusion platforms, so that the electrode piece massaging heads can adjust position, the electrode pieces are attached to a neck, and the massaging comfort degree is improved.

The invention relates to a digital signal processor (DSP) embedded controller for an electric dust-removing three-phase high-voltage direct-current power supply, comprising a hardware system and a software system. The DSP embedded controller is characterized in that the hardware system comprises a control core unit of a DSP, a synchronizing signal circuit, a trigger pulse circuit, a digital quantity output circuit, a digital quantity input circuit, an analog quantity collecting circuit, a communication connector, a man-machine display, an operative keyboard, a power supply module and an photoelectric isolator; and the software system is started to normally run by electric resetting or keyboard resetting on the system, and then a software interrupting module, a hardware interrupting moduleand a task module in the control software are managed and controlled by a DSP/basic input/output system (BIOS) operating system after the software system is initialized. The invention solves the problems existing in the three-phase thyristor voltage-regulating high-voltage direct-current power supply for electric dust removal and increases the reliability of the system, and can improve the effectof electric dust removal after integrally optimizing an electric dust removing system, thereby achieving the requirement of environmental protection.

A volatile memory device includes a memory cell array configured to be supplied with a first power supply voltage through a first power supply line, and configured to store data based on the first power supply line; and a peripheral circuit configured to be supplied with a second power supply voltage through a second power supply line, and configured to control the memory cell array based on the second power supply line, the peripheral circuit including a self timing pulse circuit configured to determine an operation timing of the peripheral circuit, the self timing pulse circuit configured to be supplied with the first power supply voltage through the first power supply line, and the self timing pulse circuit being configured to adjust the operation timing of the peripheral circuit according to the voltage level of the first power supply voltage.

The present invention comprises a device and a method for a deglitching circuit for a radiation tolerant static random access memory (SRAM) based field programmable gate array. The deglitching circuit for a radiation tolerant static random access memory (SRAM) based field programmable gate array comprises a configuration memory that has a plurality of configuration bits Read and write circuitry is provided to configure the plurality of configuration bits. A radiation hard latch is coupled to and controls a programmable element and an interface couples at least one of the plurality of configuration bits to the radiation hard latch when the write circuitry writes to the plurality of configuration bits.

A system for locating a ground fault in a high resistance grounded (HRG) power distribution system includes a pulsing circuit configured to introduce a pulse current into the distribution system and current sensors adapted to monitor three-phase current signals present on conductors of the distribution system, with the current sensors positioned on a number of distribution networks included in the HRG power distribution system and at a protective device included on each respective distribution network. A processor associated with each protective device receives signals from the current sensors for identifying a location of the ground fault in the HRG power distribution system, with the processor associated with each protective device receiving measurements of the three-phase current signals from the current sensors over a plurality of cycles and identifying a pattern of interest in the three-phase current signals across the plurality of cycles in order to detect a ground fault.

The invention discloses an on-orbit service relative navigation experiment platform and a work method. The on-orbit service relative navigation experiment platform comprises a three-axis electric turntable, a three-dimensional electric transversely-moving platform, a simulation control computer, a fault spacecraft equivalent device, a binocular stereo vision system and a navigation computer system. In the process of an experiment, the simulation control computer is utilized to generate an experiment scene, the three-axis electric turntable is controlled to simulate relative posture motion, and the three-dimensional electric transversely-moving platform is controlled to stimulate relative position motion; a pulse circuit triggers the binocular stereo vision system to collect images of the fault spacecraft equivalent device in a cycled mode, and a navigation computer processes the binocular images, conducts navigation and target parameter identification calculation through a relative navigation algorithm module to be verified, uploads the navigation and parameter identification result to the simulation control computer and conducts comparison and evaluation with the truth value set in the stimulation scene. The experiment platform is low in cost, high in simulation fidelity and capable of meeting the requirement of a relative navigation algorithm in quick validation of spacecraft on-orbit service.

A projector includes a liquid crystal display device has a liquid crystal display panel and a display control device coupled to the liquid crystal display panel. The display control device is composed of a first section for receiving an externally supplied video signal, and a second section succeeding the first section and coupled to the liquid crystal display panel. The second section is formed of a circuit for amplifying and converting the video signal into an ac signal supplied from the first section, and a drive pulse circuit for outputting drive pulses for driving the liquid crystal display panel. The first section and the second section are fabricated on first and second substrates separate from each other, respectively. The second section is disposed proximately to the liquid crystal display panel, and the first section and the second section are coupled via a flexible cable.

A scheme for PLL-based at-speed scan testing in which a clock generation circuit is used to generate different clock signals to scannable flip-flops of an integrated circuit. When the integrated circuit is under at-speed scan test mode of operation, the clock generation circuit receives a scan-clock signal to scan in a test vector to the scannable flip-flops during an input shift phase when shifting is enabled and to scan out a resultant vector from the scannable flip-flops during an output shift phase when shifting is also enabled. However, when shifting is not enabled during a capture phase between the two shift phases, the scan-clock signal triggers a 2-pulse circuit to release two pulses during the capture phase of at-speed scan testing. The two pulses from the 2-pulse circuit are based on an internal PLL-based clock signal. The clock generation circuit may be utilized in single or multiple clock domain systems. In a multiple clock domain environment, separate scan-clock signals may be sent to individual clock domains within an integrated circuit and only the domain to be acted on by a test vector has its respective scan-clock pulsed during the capture phase.

A circuit is provided for over-driving a super-luminescent light emitting diode having a maximum forward continuous current rating. A power supply provides a pulse width modulated signal to an analog memory connected to the power supply and a pulse generator. The pulse generator includes a window comparator engaged with the analog memory, and is responsive to a portion of the pulse width modulated signal. A power driver that is controlled by the output of the pulse generator, is operably connected with the super-luminescent light emitting diode and with the power supply so as to energize the super-luminescent light emitting diode with a current that is above the maximum forward continuous current rating by between two and ten times that rated current. A signal is also provided along with a method of over-driving a super-luminescent light emitting diode. An inverter and timer are coupled to the pulse generator and an array of light emitting diodes that operate at time intervals determined by the timer that are wholly distinct from time intervals when the at least one super-luminescent light emitting diode is over-driven.

An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises a plurality of scan chains coupled to the additional circuitry, a scan capture clock generator configured to generate a scan capture clock signal having a controllable number of capture pulses, and a clock selection circuit configured to select between at least the scan capture clock signal and a scan shift clock signal for application to clock signal inputs of the scan chains. In one embodiment, the scan capture clock generator comprises a finite state machine, a plurality of capture clock pulse circuits each generating a capture clock pulse signal comprising a different number of capture clock pulses, and logic circuitry coupled to the finite state machine and having inputs adapted to receive the outputs of the capture clock pulse circuits. The logic circuitry is configured to provide at an output thereof at least a portion of a particular one of the capture clock pulse signals based on a current state of the finite state machine.

The invention provides a protection device of a power supply line disconnection fault, comprising a voltage-stabilizing circuit, a three-phase voltage sampling circuit, a three-phase voltage comparison circuit, a signal superimposed circuit and a split-phase pulse output circuit, wherein the output end of the three-phase voltage sampling circuit is connected with the three-phase voltage comparisoncircuit; and the output end of the three-phase voltage comparison circuit is connected with the split-phase pulse output circuit through the signal superimposed circuit. The protection device of thepower supply line disconnection fault is characterized in that a three-phase voltage-stabilizing circuit is used as the voltage-stabilizing circuit and is additionally provided with a grounding current control circuit, a blanking pulse circuit and a protection circuit, wherein the input end of the grounding current control circuit is connected with the split-phase pulse output circuit, and the output end of the same sequentially generates three-phase grounding current on the ground; and the blanking pulse circuit and the protection circuit are both connected with the grounding current controlcircuit. The invention utilizes the residual current of the front end of the grounding current control circuit to detect the tripping operation protection of the protection device after the power supply line disconnection fault is detected, and enables a system to have very simple structure and reliable property and provide protection for faults, i.e. zero line disconnection, phase line disconnection, extra-high voltage, extra-low voltage, and the like.

The invention discloses a device and a method for synchronous discharge of multiple plasma synthetic jet actuators. The method comprises the following steps: providing a power source for a pulse generator module by a first power supply, and using a pulse generator to provide a driving signal for the switch of a switching synchronization drive circuit; providing a power source for the switching synchronization drive circuit by a second power supply, and using the switching synchronization drive circuit to provide a synchronous trigger signal for switches of multiple high-voltage pulse circuits; providing a power source for the high-voltage pulse circuits comprising multiple high-voltage pulse circuit modules by a third power supply, and enabling the high-voltage pulse circuits to be matched with the plasma synthetic jet actuators to generate multipath plasma synthetic jet flows. The device and the method have the beneficial effects that the multiple plasma synthetic jet actuators synchronously run, the discharge current exceeds 100A, and a powerful synthetic jet can be generated; the device is compact in structure and is capable of running for a long time.

The invention discloses a mosquito eradication device based on simulated body breaths. The device comprises a power supply module, a mosquito trapping layer and a mosquito eradication layer, wherein the mosquito eradication layer is made of metal wires which are interwoven to form a metal net, and the metal net defines a hollow ball shape in an enclosed mode; the mosquito eradication layer is connected with the power supply module; the mosquito trapping layer is arranged in the mosquito eradication layer and comprises a mosquito trapping layer outer shell, an ultraviolet lamp and a carbon dioxide generator; the mosquito trapping layer outer shell is hollow, a plurality of air outlet holes are formed in the surface of the mosquito trapping layer outer shell, and each air outlet hole is provided with an automatic valve; the automatic valves are connected with a pulse circuit and are opened and closed periodically according to level indications of the pulse circuit; the surface of the mosquito trapping layer outer shell is provided with a smell layer capable of isolating ultraviolet rays and attracting mosquitoes. The mosquito eradication device is simple in structure, good in mosquito eradication effect and suitable for home use.

The invention discloses a method for calibrating a satellite system clock based on a bus mode. In the method,, a low-accuracy clock user is mutually connected with a high-accuracy clock source through a serial data bus, and the clock is calibrated by the following steps of: 1) generating a local system clock parameter TL and transmitting the parameter to the high-accuracy clock source by the low-accuracy clock user; 2) receiving the clock parameter TL and simultaneously generating a real-time clock parameter TH of the clock source by the high-accuracy clock source, subtracting the two parameters to acquire time difference data Delta Tlast, and correcting fixed time delay to acquire time difference data Delta Tlast; 3) acquiring the time difference data Delta Tlast and adding the time difference data Delta Tlast to a system clock of the low-accuracy clock user by the low-accuracy clock user; and 4) repeating the steps 1), 2) and 3) according to certain period intervals. The method has the advantages of reducing a hardware pulse circuit and simplifying an interface between single satellites.

The invention belongs to the technical field of electronic circuits, and in particular relates to an ultra-high-voltage level shifting circuit for an IGBT (Insulated Gate Bipolar Translator) driving chip. The ultra-high-voltage level shifting circuit disclosed by the invention comprises a pulse circuit generation module, a pulse signal shaping module, an ultra-high-voltage level shifting module and an RS trigger, wherein the pulse signal shaping module and the ultra-high-voltage level shifting module are each composed of two sub-modules same in structure; each sub-module forms a circuit; one control chain is used for generating a pulse signal chain for turning on a high-side IGBT; and the other control chain is used for generating a pulse signal chain for turning off the high-side IGBT. The ultra-high-voltage level shifting circuit disclosed by the invention has the benefits that: the turn-on speed of a NLDMOS (N-channel Laterally Diffused Metal Oxide Semiconductor) is reduced while the level shifting power consumption is reduced; dV/dt and di/dt of the NLDMOS are reduced; and the reliability of the NLDMOS is increased.

The invention discloses a technical proposal of a switch power supply device. The device is based on a resonance circuit. The device simultaneously uses a consequent mode and a retrace scanning mode and also the resonance circuit so as to generate a high frequency alternating current power supply for driving load. The device comprises a transformer, a switching tube, a capacitor, a pulse circuit and the like; wherein in the breakover stage of the switching tube, an input power supply outputs energy to the load by the transformer and the capacitor, and simultaneously the input power supply stores the energy in the transformer; in the stopping stage of the switching tube, the energy stored in the transformer is output to the load by the capacitor.