The invention discloses an
MOSFET chip manufacturing process for improving grid characteristics, which comprises the following steps: removing an isolation
oxide layer in a groove region, obtaining first lightly-doped
polycrystalline silicon and second lightly-doped
polycrystalline silicon on the
peripheral side of a groove, heavily
doping the lightly-doped
polycrystalline silicon in the groove, obtaining first heavily-doped polycrystalline
silicon, and removing the residual isolation
oxide layer in a body forming region and a source region, close to the groove, of the epitaxial layer; carrying out heavy
doping on part of the region of the first lightly-doped polycrystalline
silicon, and obtaining second heavy-doped polycrystalline
silicon; forming a
dielectric layer upwards, wherein the type of the second heavy-doped polycrystalline silicon is opposite to that of the first lightly-doped polycrystalline silicon; and forming a
diode by the first lightly doped polycrystalline silicon and the second heavily doped polycrystalline silicon, forming a
resistor by two ends of the second lightly doped polycrystalline silicon, and connecting the
diode with the
resistor in parallel to be connected to the grid
electrode in series. The polycrystalline silicon
resistor and the polycrystalline silicon
diode are integrated in the
chip, so that the current flowing through the grid
electrode is effectively limited, and the protection on the grid
electrode is realized.