Receiver recovering signal clock from received data signal, and clock recovery method implemented in receiver
A technology for receiving data and recovering a clock, which is applied in the field of receivers implementing the clock recovery method, and can solve the problems of occupying space and power consumption.
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[0052] Aspects of the invention generally address one or more issues related to the complexity and power consumption of receiver front-end components used to recover clocks from received data signals.
[0053] Traditional clock recovery schemes implemented in receivers such as 4-level pulse amplitude modulation (PAM) receivers and high-speed optical data receivers require complex front-end architectures that occupy a large area within the receiving chip and consume a large amount of power .
[0054] Referring now to the accompanying drawings, Figure 1a and Figure 1b represent transitions between binary and quaternary symbols received at the receiver, respectively. exist Figure 1a , the data samples at time(n-1) and time(n), identified as "D[n-1]" and "D[n]", can have logical values 0 or 1. The delay between D[n-1] and D[n] is called the unit interval (UI), and the data samples D[n-1] and D[n] are most easily detected at the center of the corresponding UI. Between time ...
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