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Coded flash memory structure and data processing method

A flash memory and coding technology, applied in the field of coded flash memory structure and data processing, can solve the problems of insufficient utilization efficiency of floating gate transistor array, unable to further improve the data processing efficiency of flash memory structure, etc. Effect

Active Publication Date: 2022-03-29
PEKING UNIV
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Problems solved by technology

[0005] In order to solve the technical problem that the utilization efficiency of the floating gate transistor array in the flash memory structure in the prior art is insufficient and the data processing efficiency of the flash memory structure cannot be further improved, the present invention discloses a coded flash memory structure and a data processing method

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  • Coded flash memory structure and data processing method
  • Coded flash memory structure and data processing method

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Embodiment Construction

[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0028] In order to solve the technical problem that the utilization efficiency of the floating gate transistor array in the flash memory structure in the prior art is insufficient and the data processing efficiency of the flash memory structure cannot be further improved, the present invention discloses a coded flash memory structure and a data processing method.

[0029] The flash memory system that can be implemented based on the counter assistance to complete data processing (such as image convolution operation) based on the coded flash memory structure of the present invention includes: a processing module and an output module applied to operation processing, the processing module can have a coded flash memory array, W...

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Abstract

The invention discloses a coded flash memory structure and a data processing method. The coded flash memory structure includes: an input module, a processing module and an output module, the processing module includes: a flash memory array, and the flash memory array includes: W×B floating gate transistors and B bit lines, W floating gate transistors are arranged along the first direction to form an array subunit, and B array subunits are arranged along the second direction to form a flash memory array, wherein B≥2, W≥2; B bitlines are in The second direction is arranged parallel to each other, and each bit line is connected to the source and / or drain of each floating gate transistor of the W floating gate transistors in each array subunit in the first direction. The coded flash memory structure of the present invention realizes that there are multiple floating gate transistors in the working state on the same bit line, which greatly improves the utilization efficiency of the transistor array, thereby further improving the data processing efficiency of the flash memory structure.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to an encoded flash memory structure and a data processing method based on a counter to assist in realizing matrix-vector multiplication. Background technique [0002] In the field of computer science, data processing (such as image processing, data dimension reduction, etc.) can be implemented according to the memory structure in the semiconductor field and the calculation method based on the memory structure. For example, a matrix-vector multiplication operation refers to an operation in which the input is a matrix and a vector, and the output is a vector, which can be applied to data processing. For example, in a neural network, the multiplication and addition of inputs and weights in the convolutional layer and fully connected layer can be processed in the form of matrix-vector multiplication, so improving the efficiency of matrix-vector multiplication ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/24G06F17/16G06T1/60
CPCG11C16/24G06F17/16G06T1/60
Inventor 黄鹏韩润泽刘晓彦康晋锋
Owner PEKING UNIV