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3D memory device manufacturing method

A manufacturing method and technology of storage devices, applied in the field of storage, capable of solving the problems of reduced yield and reliability of 3D storage devices

Active Publication Date: 2021-07-16
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The width of the gate line gap changes and the channel column is exposed to the gate line gap to cause leakage, which reduces the product yield and reliability of the 3D memory device.

Method used

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Experimental program
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Embodiment Construction

[0026] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0027] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0028] If it is to describe the situation directly on another layer or an...

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PUM

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Abstract

The present application discloses a method for manufacturing a 3D storage device. The manufacturing method includes: forming a sacrificial stack structure on a substrate; forming a plurality of channel pillars and a plurality of dummy channel pillars penetrating through the sacrificial stack structure, and the plurality of channel pillars and the plurality of dummy channel pillars are respectively located on each other In the adjacent cell area and the peripheral area; forming a plurality of grid line gaps through the openings of the resist mask; using the plurality of grid line gaps as etching channels and deposition channels, replacing multiple sacrificial layers with multiple gate conductors, To form a gate stack structure, wherein, in the peripheral region, an opening width of the resist mask varies with a distance from a boundary between the cell region and the peripheral region. The manufacturing method can form gate line gaps with consistent widths in the unit area and the peripheral area, thereby improving the product yield and reliability of the 3D storage device.

Description

technical field [0001] The present invention relates to memory technology, and more particularly, to a method for manufacturing a 3D memory device. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared with NO...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11565H01L27/1157H01L27/11573H01L27/11582
CPCH10B43/10H10B43/40H10B43/35H10B43/27
Inventor 李卫东徐伟周文斌
Owner YANGTZE MEMORY TECH CO LTD