Clock data recovery circuit with waveform screening function for PAM4 receiver and PAM4 receiver

Abstract

The invention discloses a clock data recovery circuit with a waveform screening function for a PAM4 receiver and the PAM4 receiver. The clock data recovery circuit for the PAM4 receiver comprises a clock data recovery circuit body with a comparator module and a phase discriminator module, wherein the front end of the phase discriminator module is connected with a waveform screening circuit in series, and the waveform screening circuit is used for selecting symmetrical waveforms in output signals of the comparator module as an output; the PAM4 receiver comprises the clock data recovery circuitfor the PAM4 receiver. The objective of the invention is to solve the problem that the CDR of a PAM4 receiver deteriorates the jitter performance of a recovery clock while improving the phase discrimination density. According to the invention, the waveform screening circuit is added, and the waveform screening circuit selects symmetrical jump edges in the output signals of the three comparators asthe input of the phase discriminator, thereby improving the phase discrimination precision while improving the phase discrimination density, and improving the jitter performance of a CDR recovery clock while guaranteeing the quick locking of a loop.

Description

technical field [0001] The invention belongs to the fields of computer and optical communication, and in particular relates to a clock data recovery circuit for a PAM4 receiver with a waveform screening function and the PAM4 receiver, which can be applied to the fields of electrical communication and optical communication between chips and backplanes. Background technique [0002] A clock and data recovery circuit (CDR) is widely used in the fields of computers and optical communications. Its main function is to extract clock information from input data with amplitude noise and phase noise, and then retime the data. [0003] The CDR is located in the receiver, and its working principle is as follows: ①Comparing the input data with the local clock and obtaining the phase difference information between the two; ②Using the phase difference information to control the phase of the local clock in real time to ensure that the phase of the local clock is consistent with the input dat...

AI Technical Summary

Problems solved by technology

These asymmetric waveforms will directly deteriorate the phase detection accuracy

The phase detector performs phase detection on the edge and center sampling results of these data. Therefore, whether the jump edge has symmetry directly affects the phase detection result of the phase detector, and finally deteriorates the jitter performance of the CDR recovery clock.

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