31results about How to "Improve phase detection accuracy" patented technology

A radiographic apparatus includes a first grating, a second grating, a scanning unit, and a radiological image detector. The second grating includes a periodic form that has a period which substantially coincides with a pattern period of a radiological image formed a radiation having passed through the first grating. The scanning unit relatively displaces the radiological image and the second grating to a plurality of relative positions at which phase differences between the radiological image and the second grating are different each other. The radiological image detector detects the radiological image masked by the second grating. The scanning unit includes a driving unit that drives one of the first grating and the second grating relatively to the other in a pattern arrangement direction of the radiological image and a plurality of elastic members that has natural frequencies different from each other.

The invention discloses a frequency-locked loop and subcarrier loop united phase discrimination tracking loop which comprises a carrier tracking loop, a subcarrier tracking loop and a spreading code tracking loop. The carrier tracking loop firstly conducts carrier stripping processing on received intermediate-frequency BOC signals, the obtained output signals are used as the input of the subcarrier tracking loop, and multiplied by local cosine and sinusoidal signals generated by a subcarrier numerically controlled oscillator, and the obtained signals are input to the spreading code tracking loop to conduct code phase tracking. Due to the ambiguity problem of binary system offset carrier signal tracking, the united phase discrimination method is adopted in the united tracking loop of the carrier tracking loop and the subcarrier tracking loop so as to solve the problem of phase ambiguity caused by noise when the signal to noise ratio is low. Due to the united phase discrimination method, the phase discrimination precision is improved, and the accurate tracking is achieved.

This invention relates to a high-frequency clock jitter measuring circuit and calibration method thereof, which comprises a first/second oscillation signal unit to generate the first/second oscillation signal with TV1/TV2 period (TV1 G01R 29/02 G01R 23/02 G01R 31/00 H03K 5/19 6 13 4 2006/4/18 1837835 2006/9/27 100501423 2009/6/17 2009/6/17 2009/6/17 Peking University Shenzhen Graduate School 518057 Zhang Jingkai Li Chongren Yu Fei Tian Chao guo yan 44223

The invention provides a lead-lag digital phase discriminator structure which is composed of a first signal path, a second signal path and a three-input NAND gate. The first signal path comprises a first D-trigger, a first phase inverter, a first buffer, a first NAND gate, a first digital pulse amplifier and a third D-trigger. The second signal path comprises a second D-trigger, a second phase inverter, a second buffer, a second NAND gate, a second digital pulse amplifier and a fourth D-trigger. The third input end of the three-input NAND gate is connected with an input enabling signal, and the output end is connected with the reset ends of the first and second D-trigger. Effective time of a trigger signal is increased via appropriate additional arrangement of certain logic units and triggers so that lead-lag phase discrimination precision can be greatly enhanced.

The invention discloses a compact field scanning device, solving the problem that a scanning rack of the prior art is big in the measurement error. The compact field scanning device includes a scanning rack and a laser collimator, wherein the scanning rack includes an orientation adjusting mechanism, a pitch adjusting mechanism, a horizontal scanning rack, a vertical scanning rack, and a compensation mechanism; the laser collimator includes a transmitting device and a receiving device; the transmitting device is located at a fixed point above the ground for generating a laser beam parallel toa field plane; the receiving device is fixed at an end portion of a motion tube for receiving the laser beam; after receiving the laser beam, the receiving device detects an offset; and a control unitreceives the offset, and controls the compensation mechanism to reduce the offset. The compact field scanning device can improve the compact field plane wave phase detection accuracy, and can avoid the defects of manual operation, low efficiency, low speed and the like.

The invention discloses a phase detection method and device, and equipment. The phase detection device comprises a signal processing component, a phase discrimination component and a phase comparison component, wherein the signal processing component is used for obtaining a reference clock signal and an initial phase value thereof; the phase discrimination component is used for obtaining a to-be-detected clock signal and obtaining a first phase difference signal according to the reference clock signal and the to-be-detected clock signal; the phase comparison component is used for obtaining a phase adjustment signal according to the first phase difference signal; the signal processing component is also used for carrying out phase adjustment on the reference clock signal according to the phase adjustment signal so as to reduce the first phase difference signal, accumulating the adjusted phase value so as to obtain a phase cumulative value, and obtaining the phase value of the to-be-measured clock signal according to the phase cumulative value and the initial phase value. In the embodiment of the invention, the phase of the reference clock signal can approach the phase of the to-be-measured clock signal through limited times of processing, so that the clock phase can be measured at high precision and high speed.

This invention discloses a clock phase-discriminating device and a method for testing the phase difference of a primary signal and a tested signal, in which, the phase signals to be tested expressing the phase difference between the primary signal and the tested signal should be got and the phase-discriminating clock signal numbers contained in the width of the phase signal te be tested should be accumulated to carry out symmetric integration to the continued phase-discriminating clock signals to get numeric quantity integration result of phase-discriminating clock signals and their phase values then to compute the phase width of the phase signal to be tested, which can increase the accuracy for clock phase-discrimination.

An under-sampling phase detection method and device used in phase laser range finding relate to the field of phase laser range finding. The invention aims to solve the problem that it is difficult toaccurately extract phase information by using the existing phase detection method because of the high frequency and noise of the transmitted signals and the echo signals in the phase laser rangefinder. The method of the invention includes the following steps: transmitted signals and echo signals are under-sampled, and a discrete sequence of the transmitted signals and a discrete sequence of the echo signals are obtained; discrete Fourier transformation is carried out on the two discrete sequences, the maximum values of spectral lines in the two discrete sequences are selected according to theresult of transformation, and the locations of the two groups of spectral lines are determined according to the maximum values of the two groups of spectral lines; and the initial phases of the transmitted signals and the echo signals are calculated according to the locations of the two groups of spectral lines, difference operation is performed on the initial phases of the transmitted signals andthe echo signals, and the difference obtained is the phase detection result. The method and the device are used to extract the phase information of high-frequency signals in a phase laser rangefinder.

The invention relates to a high-speed phase detector, in particular to a high-speed phase detector based on the single-phase-clock dynamic CMOS technology, belonging to the technical field of signal processing and the circuit thereof. Based on the traditional phase detector, a time delay module is added to a feedback loop, so that no dead zone exists when the phase detector is in operation; and a high speed D trigger is used for replacing the traditional low speed D trigger, thereby causing the working speed of the phase detector to reach 900 MHz. The phase detector has the advantages of high working speed, easy manufacture, and no dead zone during the operation, and is especially suitable for precisely differentiating the phase difference of two input signals in a delay-locked loop.

The invention discloses a multi-sensor partial discharge sound signal phase detection circuit. The power output end of a power module is electrically connected with the power end of a control module, the power end of a first sound reproduction module, the power end of a second sound reproduction module, the power end of a third sound reproduction module, the power end of a fourth sound reproduction module, the power end of a fifth sound reproduction module and the power end of a sixth sound reproduction module. The signal transmission end of the first sound reproduction module, the signal transmission end of the second sound reproduction module, the signal transmission end of the third sound reproduction module, the signal transmission end of the fourth sound reproduction module, the signal transmission end of the fifth sound reproduction module and the signal transmission end of the sixth sound reproduction module are electrically connected with the signal transmission end of the control module, and the power supply module comprises +5V and +15V. The first sound reproduction module, the second sound reproduction module, the third sound reproduction module, the fourth sound reproduction module, the fifth sound reproduction module and the sixth sound reproduction module are sequentially distributed in a spherical shape. The detection circuit has the advantages of strong anti-interference performance, accurate measurement and the like.

The invention relates to the field of signal demodulation, in particular to a digital FM signal demodulator with instant AGC. The digital FM signal demodulator with instant AGC aims to solve the existing technical problems. Through real-time modulation on signal quantization amplitude by means of the instant AGC, the digital FM signal demodulator solves the problem that demodulation is high in error rate due to small FM signal quantization amplitude, and increases the accurate rate of demodulation. The digital FM signal demodulator with instant AGC comprises an ADC unit, an orthorhombic dual-channel digital downconversion unit, an extraction and filtration unit, an instant AGC unit and the like. Intermediate frequency signals generated by a signal generator are input into the ADC unit and quantized into digital signals through the ADC unit, and then the digital signals pass through the orthorhombic dual-channel digital downconversion unit, the extraction and filtration unit, the instant AGC unit and the like in sequence, wherein the instant AGC unit increases the number of quantization significance bits of I(n) and Q(n) signals to the value of the most significant bit allowed by a CORDIC module by detecting the number of quantization sign bits of the I(n) and Q(n) signals, and the error rate of demodulation is lowered effectively.

The invention provides a clock phase discrimination method and device, and the method comprises the steps: generating a plurality of output clocks, determining a target output clock with the smallestphase deviation value with a reference clock from the plurality of output clocks, and recording a first deviation value between the target output clock and a to-be-discriminated phase clock; in two adjacent clock periods, sampling the target output clock according to the reference clock, and determining whether the target output clock is aligned with the reference clock or not according to a sampling result; if the target output clock is not aligned with the reference clock, adjusting the phase of the target output clock according to a preset phase value, sampling and judging again until it isdetermined that the target output clock is aligned with the reference clock, and recording a second deviation value between the adjusted target output clock and the target output clock; and if so, compensating the to-be-discriminated phase clock according to the first deviation value and the second deviation value. By applying the embodiment of the invention, the phase discrimination precision can be improved.

The invention relates to a clock in a digital circuit, and discloses a digital phase detector, so that the phase detection accuracy can be improved under the same frequency phase detection clock. This digital phase detector includes: a delay module, which is used to generate a plurality of phase detection clock signals with different phases according to a phase detection clock signal; The phase detection clock signals of the phases are counted separately, and the total phase detection count value is saved for external use.