Under-sampling phase detection method and device used in phase laser range finding
A laser ranging and undersampling technology is applied in the phase detection field of phase laser ranging, which can solve the problems of noise, high frequency of signals and echo signals, and it is difficult to accurately extract phase information, etc., so as to improve the accuracy and frequency. Resolution, the effect of reducing the amount of calculation
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specific Embodiment approach 1
[0026] Specific implementation mode one: refer to figure 1 , 2 and 3 specifically illustrate the present embodiment, a kind of subsampling phase identification method for phase type laser ranging described in the present embodiment, the method comprises the following steps:
[0027] Step 1: Set the undersampling frequency f s The transmitted signal e(t) and the echo signal r(t) are under-sampled. Since e(t) and r(t) contain noise, in practice, the under-sampling frequency f s Need to meet: 0.5f s 0 s , 2f 0 / f s ≠ integer.
[0028] The expression of the transmitted signal e(t) is:
[0029]
[0030] The expression of the echo signal r(t) is:
[0031]
[0032] In the above formula, A 1 and B 1 are the magnitudes of e(t) and r(t), respectively, with are the initial phases of e(t) and r(t), respectively, f 0 is the modulation frequency, and t is the time.
[0033] After the undersampling operation, the spectra of e(t) and r(t) lie in the spectral band [f s / 2...
specific Embodiment approach 2
[0064] Specific implementation mode two: refer to Figure 4 with 5 Describe this embodiment in detail, a kind of subsampling phase detection device for phase type laser ranging described in this embodiment,
[0065] The under-sampling phase detection device adopts the "FPGA+ARM" method, and the FPGA is used for signal acquisition and processing, and the ARM processor realizes the control of the system, and the phase detection results are transmitted to the host computer in real time through the network interface circuit. Described sampling phase discrimination device specifically comprises: program-controlled amplifying circuit 1, analog-to-digital conversion circuit (ADC) 2, FPGA3, ARM control unit 4, trigger circuit 5, network interface circuit 6 and upper computer 7;
[0066] The program-controlled amplifying circuit 1 is used to collect transmission signals and echo signals, and amplify the collected signals. The waveform signal output terminal of the program-controlled a...
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