Bridging fault simulation device of optical router and control method

A technology for bridging faults and simulating devices, which is applied to multiplexing system selection devices, selection devices, electrical components, etc., can solve problems such as MRR bridging faults, optical routers that cannot simulate bridging faults, and sensitivity to high temperature fluctuations, etc., to achieve The effect of improving reliability

Pending Publication Date: 2020-08-21
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

[0004] The purpose of the present invention is to provide a bridge fault simulation device for optical routers, which aims to solve the problem that MRR in the prior art is sensitive to high temperature fluctuations, MRR is prone to bridge faults, and existing optical routers cannot effectively simulate bridge faults. Network-on-a-Chip faces serious reliability issues as technical issues

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  • Bridging fault simulation device of optical router and control method
  • Bridging fault simulation device of optical router and control method
  • Bridging fault simulation device of optical router and control method

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no. 1 example

[0027] see Figure 1 to Figure 5 , the present invention provides a bridge fault simulation device for an optical router, comprising four input ports, four output ports and eight simulators, the four input ports are respectively the first input port D1 and the second input port D2 , the third input port D3 and the fourth input port D4, the four output ports are respectively the first output port Q1, the second output port Q2, the third output port Q3 and the fourth output port Q4; the eight analog The first simulator 1, the second simulator 2, the third simulator 3, the fourth simulator 4, the fifth simulator 5, the sixth simulator 6, the seventh simulator 7 and the eighth simulator 8 , the first simulator 1 is connected to the first input port D1, and is connected to the first output port Q1 and the third output port Q3, and the second simulator 2 is connected to the first input port D1 connected, and connected with the second output port Q2, the third output port Q3, the th...

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Abstract

The invention discloses a bridging fault simulation device of an optical router and a control method. An analog multiplexer A is connected with two switchable first connecting branch components; the first connecting branch component is connected to the input of the either-or multiplexer 01, and the output of the either-or multiplexer 01 is output from the output port Q11 and the output port Q32 through an OR gate connected with the first connecting branch component; an analog multiplexer B is connected with the two switchable second connecting branch components; the second connecting branch component is connected to the input of the either-or multiplexer 02; and the output is output from the output port Q21 and the output port Q31 through an OR gate connected with the second connection branch component, so a single bridging fault of the MRR caused by heat sensitivity can be effectively simulated, and an important role is played in improving the reliability of the network-on-chip.

Description

technical field [0001] The invention relates to the field of optical routers, in particular to a bridge fault simulation device and control method for an optical router. Background technique [0002] At present, as a product of the development of integrated circuits, network-on-chip has become the mainstream communication architecture of multi-core and many-core systems on chip. It uses routers as data sending and receiving media to provide communication between multiple functional modules, thereby reducing delays and Reduce power consumption, improve system performance, and meet the communication efficiency requirements of multi-core systems. However, with the reduction of feature size and the increase of integration density, etc., the chip will face serious reliability problems. [0003] Chip integration continues to increase, and the number of transistors that can be integrated in a single chip and the total area of ​​the chip are increasing, resulting in more defects in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04Q11/00
CPCH04Q11/0003H04Q11/0005H04Q11/0062H04Q2011/0081H04Q2011/0083
Inventor 朱爱军赵春霞古展其牛军浩胡聪许川佩
Owner GUILIN UNIV OF ELECTRONIC TECH
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