Configuration target tracking hardware acceleration control method and system, storage medium and application

Abstract

The invention belongs to the technical field of computer vision, and discloses a configuration target tracking hardware acceleration control method and system, a storage medium and an application. Themethod comprises steps of completing extraction of a region of interest and calculation of a sample label value; completing extraction of target features of the region of interest, and selecting grayfeatures, color features or HOG features for configuration according to the target features; performing filter training and position prediction on the extracted target features through different kernel functions, and configuring the target features as a Gaussian kernel function, a linear kernel function or a polynomial kernel function; selecting target areas of different scales for calculation according to whether the target generates spatial displacement or not, comparing response values, and selecting an optimal target position; parameters of the filter are updated by utilizing the result of the current frame, and a continuous model updating strategy or a threshold updating strategy can be selected. According to the method, iteration can be rapidly updated, and the method has high transportability for other computer vision algorithms.

Description

technical field [0001] The invention belongs to the technical field of computer vision, and in particular relates to a control method, system, storage medium and application for configuring target tracking hardware acceleration. Background technique [0002] In the process of video target tracking, many target tracking algorithms are implemented by C++ or M language and deployed in CPU and GPU. Since these platforms cannot meet the real-time requirements in actual scenarios, the high-speed processing of target tracking algorithms is a must. An applied work in the field of computer vision. [0003] Many target tracking acceleration algorithms currently proposed are implemented based on traditional FPGA design methods. Most of these algorithms are only for a single scene and cannot be iteratively updated quickly to adapt to a variety of actual environments. In addition, as the complexity of the algorithm is getting higher and higher, it is difficult to implement the target f...

AI Technical Summary

Problems solved by technology

Most of these algorithms are only for a single scene and cannot be iteratively updated quickly to adapt to a variety of actual environments

In addition, as the complexity of the algorithm becomes higher and higher, it is difficult to implement the target feature extraction algorithm using the hardware description language VHDL or Verilog

Images