A kind of glue coating method of ultra-thin wafer with taiko ring structure as substrate

Abstract

The invention provides a method for gluing an ultra-thin wafer with a taiko ring structure as a substrate, which comprises the following steps: setting a preset vacuum degree, and adsorbing the wafer to be coated on the support under the preset vacuum degree On the wafer stage, the wafer stage is controlled to rotate at the first speed, and the center of the wafer is glued through the glue nozzle; after the gluing is completed, the wafer stage rotates at the second speed for glue reflow, and the second speed is lower than the first speed. 1 rotation speed; the wafer stage first rotates at the third rotation speed, and then rotates at the fourth rotation speed, and the third rotation speed is less than the fourth rotation speed, and the wafer is subjected to variable-speed glue rejection; the wafer stage is controlled to be ejected at the fifth rotation speed to complete the lithography Then control the wafer carrier to rotate at the sixth rotational speed to form a film of photoresist on the wafer surface, and the fifth rotational speed is less than the sixth rotational speed; the wafer carrier rotates at the seventh rotational speed, and cleans the wafer from the wafer through the cleaning nozzle. Scanning from the first position to the second position to perform edge trimming processing can improve the uniformity of the photoresist on the wafer surface and avoid photoresist accumulation and liquid backsplash.

Description

technical field [0001] The invention relates to the technical field of semiconductor lithography, in particular to a method for gluing an ultra-thin wafer with a taiko ring structure as a substrate. Background technique [0002] As the development of electronic products tends to be multi-functional integration and miniaturization, the requirements for portability are getting higher and higher. This requires circuit chips to continue to develop in the direction of high density, high performance, light, thin and short, which requires the continuous reduction of the thickness of the chip package. Taking memory as an example, its packaging form is mainly stacked packaging. With the continuous increase of storage capacity , the number of layers of the package has reached more than 96 layers. In order to meet the requirements of advanced IC packaging, the thickness of each layer of chips in the stack inevitably needs to be reduced when the overall thickness of the package remains ...

AI Technical Summary

Problems solved by technology

[0005] However, the above-mentioned method and the glue-spinning step in the existing wafer gluing process formula are generally traditional low-speed-high-speed simple structures, and this formula is very easy to make the wafer surface photoresist when coating a taiko ring with a special substrate. Coating is uneven, film thickness stability is difficult to control, and the junction of taiko ring and plane is easy to cause photoresist accumulation and liquid backsplash, which is difficult to remove later

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