Manufacturing method of semiconductor power device
A technology for power devices and manufacturing methods, which is applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as affecting the withstand voltage of semiconductor power devices, and achieve the effect of not affecting the withstand voltage and reducing thickness
Active Publication Date: 2021-10-22
SUZHOU ORIENTAL SEMICONDUCTOR CO LTD
View PDF12 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
In the manufacturing method of semiconductor power devices in the prior art, in order to ensure the quality of the polysilicon gate, it is necessary to form a first dielectric layer with sufficient thickness, but the thickness of the first dielectric layer will affect the charge depletion at the bottom of the trench, thereby affecting the semiconductor power. device withstand voltage
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0030] The technical solutions of the present invention will be fully described below in conjunction with the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, not all, embodiments of the present invention. At the same time, in order to clearly illustrate the specific implementation of the present invention, the schematic diagrams listed in the accompanying drawings of the specification magnify the thickness of the layers and regions described in the present invention, and the listed figures do not represent the actual size.
[0031] Figure 1 to Figure 6 It is a schematic cross-sectional structure diagram of the main structure in the manufacturing process of an embodiment of the manufacturing method of the semiconductor power device provided by the present invention.
[0032] First, if figure 1 As shown, a first insulating layer 31 is formed on the provided n-type substrate 20. The n-type substrate 20 is usual...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention belongs to the technical field of semiconductor power devices, and specifically discloses a method for manufacturing a semiconductor power device, including: using the first insulating layer, the second insulating layer and the third insulating layer as masks to self-align the etched n-type lining At the bottom, a second trench is formed in the n-type substrate, and a fourth insulating layer and a gate are formed in the second trench. In the manufacturing method of the semiconductor power device of the present invention, the formation quality of the gate is not limited by the thickness of the second insulating layer. Under the condition of ensuring the quality of the gate, the thickness of the second insulating layer can be reduced, so that the durability of the semiconductor power device can be reduced. Pressure is not affected.
Description
technical field [0001] The invention belongs to the technical field of semiconductor power devices, in particular to a manufacturing method of semiconductor power devices. Background technique [0002] A manufacturing method of a semiconductor power device in the prior art includes: forming a hard mask layer on a provided silicon substrate, using a photolithography process to define a trench position, and then etching away the hard mask layer at the trench position ; use the etched hard mask layer as a mask to etch the silicon substrate to form a trench; cover the bottom surface and sides of the trench to form a first dielectric layer; deposit the first polysilicon layer, the first polysilicon layer The crystalline silicon layer completely fills the trench formed with the first dielectric layer and extends to the outside of the trench; performing polysilicon etching back removes the first polysilicon layer outside the trench, and the remaining first polysilicon layer after e...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/308
CPCH01L21/28035H01L21/28114H01L21/3086H01L21/3083H01L29/66734H01L29/66719H01L29/407H01L29/401H01L29/7813
Inventor 刘伟徐真逸毛振东王鑫
Owner SUZHOU ORIENTAL SEMICONDUCTOR CO LTD