43results about How to "Reduce saturation pressure drop" patented technology

The invention relates to an insulated gate bipolar transistor device with low conduction voltage drop, and a manufacturing method for the insulated gate bipolar transistor device. The device comprises an active region located on a semiconductor substrate, and a terminal protection region. Active cells of the active region on the section of the device employ a trench structure, and comprise active cells and non-active cells. The bottom of an active cell trench and the bottom of a non-active cell trench are respectively provided with a floating region of a second conductive type, wherein the floating region of the second conductive type below the active cell trench wraps the bottom of the active cell trench, and the floating region of the second conductive type below the non-active cell trench wraps the bottom of the non-active cell trench. The device has extremely low conduction voltage drop and extremely quick cut-off speed under the condition that the withstand voltage is guaranteed, is lower in current and voltage oscillation, and greatly improves the work reliability.

The invention relates to the field of electronic devices, and discloses an insulated gate bipolar transistor and a manufacturing method thereof. According to the insulated gate bipolar transistor and the manufacturing method thereof, a first doping region is used as a super junction in the insulated gate bipolar transistor, internal fast recovery diodes are formed in a channel region and a second doping region, the advantages of a super junction MOS and the advantages of a reverse conducting insulated gate bipolar transistor are combined, the saturation voltage drop of the insulated gate bipolar transistor can be effectively lowered, higher power density is achieved, and meanwhile due to the fact that the fast recovery diodes are removed in module packaging process, production cost can be effectively lowered. Due to a buffer region layer, the requirement for the thickness of a substrate is lowered, the buffer region layer is used for accelerating the composite process of charge carriers, the trailing time of insulated gate bipolar transistor products can be effectively shortened, the turn-off loss of the products is reduced, and the cut-off frequency of the products is increased.

The invention provides a structure of a power device MPT-TI-IGBT. The front face structure comprises a drift region, a grid, a gate-oxide piece, an emitter region, a base region and a heavily doped region, wherein the base region surrounds the lower portion of the emitter region and isolates the emitter region from the drift region. The emitter region and the heavily doped region are connected with an emitter, the emitter region and the drift region are connected with the grid, and the grid is insulated from a semi-conductor region through the gate-oxide region. The back face structure comprises a collector region, a short circuit region and a micro-punch-through region located below the drift region. The structure where the collector region and the short circuit region are distributed in a spaced mode is connected with collector metal so that a collector can be led out. The power device MPT-TI-IGBT is high in turn-off speed, and can reduce connection voltage drop and on-state losses of devices.

The invention provides a MOS type power device and a preparation method thereof. A MOS-type power device comprises a substrate; a Well region; a Source region; a Gate oxide layer; a Gate electrode; anInsulating dielectric layer; A source region electrode, wherein a lower surface of the well region is provided with a protrusion extending downward. Thus, the MOS type power device has a well depth deep enough, sufficient withstand voltage margin can be ensured, At the same time, it has enough short channel and lower saturation voltage drop to increase channel density and reduce channel short-circuit current, effectively reduce on-resistance and improve short-circuit safety ability, fully ensure the reliability of device application, and has quasi-channel current self-pinch-off function to enhance the high-voltage and large-current shutdown ability of the device.

The invention provides a miniature metal fully-sealed servo circuit of a quartz flexible accelerometer and a processing method of the servo circuit. The circuit comprises a capacitance-voltage converter, a transconductance/compensation amplifier and a feedback network, the capacitance-voltage converter comprises a differential capacitance detector and an integral network, the differential capacitance detector is connected with a differential capacitance sensor of an accelerometer gauge outfit, the differential capacitance detector, the integral network and the transconductance/compensation amplifier are connected in sequence, and the transconductance/compensation amplifier is connected with a torquer of the accelerometer gauge outfit; and all components of the servo circuit are integratedon a ceramic substrate through a thick film hybrid integration process, and the servo circuit is packaged in a metal full-sealed mode. According to the servo circuit, in a metal parallel seam packaging form, of the quartz flexible accelerometer, the servo circuit is full-sealed, and the problems in reliability and heat radiation of the servo motor in the extreme environment are solved.

The invention relates to the technical field of electronics, in particular to a power storage system based on an injection enhanced gate transistor (IEGT). By adopting the energy storage system, an IEGT device is used for replacing the current IGBT (insulated gate bipolar transistor) device in a power conversion system (PCS), the capacity of a single PCS is increased, the conduction loss is reduced, and the efficiency of the PCS is further improved.

The present invention discloses an IGBT having with a super junction structure. The IGBT having the super junction structure comprises a collector, a drift region, a P-type base region and an N-type emitter region, wherein, gate grooves are formed in the P-type base region and the N-type emitter region, gate electrodes being arranged in the gate grooves; P-type regions are formed between the bottom of the gate grooves and the collector; the P-type regions are respectively connected with the bottom of the gate grooves and the collector; and spaces between the adjacent P-type regions are filled with an insulating medium. The present invention further discloses a preparation method of the IGBT having the super junction structure. The IGBT having the super junction structure provided by the present invention can generate a transverse electric field so as to improve the breakdown voltage and reduce the saturation voltage drop of a device. The preparation method provided by the present invention has the advantage of short processing time.

The invention discloses a LIGBT with a carrier storage region. The LIGBT comprises an N-type drift region. The N-type drift region comprises an N-type silicon strip. The N-type silicon strip includesthe carrier storage region. The carrier storage region is doped with hydrogen ions. The N-type drift region of the LIGBT comprises the N-type silicon strip, and the N-type silicon strip includes the carrier storage region doped with hydrogen ions so that the carrier storage region can be represented as a hole barrier layer and can reduce the saturation voltage drop Vcesat when the LIGBT is forwardturned on and can also be represented as a composite center and and can shorten the lifetime of minority carriers when the LIGBT is turned off, thus shortening the turn-off time.

The invention discloses an IGBT and a manufacturing method thereof. The manufacturing method of the IGBT comprises the following steps of implanting hydrogen ions into a semiconductor substrate and forming an n-type carrier storage layer. According to the IGBT and the manufacturing method thereof disclosed by the invention, a hydrogen ion implantation technology is adopted in the step of fabricating the carrier storage layer, thereby playing a role of an n-type hole blocking layer after the carrier storage layer is formed and forming a recombination center. Therefore, a saturation voltage dropcan be reduced, and meanwhile, the minority carrier lifetime is effectively shortened.

The invention provides a superjunction IGBT with a cutoff reverse conduction field. A second semiconductor material is implanted in a first semiconductor substrate to form a reverse conducting structure with the first semiconductor substrate. A field stopping layer and a second semiconductor material epitaxial layer with a low doping concentration are successively stacked on the upper surface of the first semiconductor substrate. A first semiconductor material and a second semiconductor material having the same concentration are implanted in the second semiconductor material epitaxial layer with the low doping concentration. The first semiconductor material and the second semiconductor material alternately form a superjunction structure multiple times along a plane wherein the epitaxial layer is located. The invention also provides a method for manufacturing the IGBT. The superjunction IGBT with a cutoff reverse conduction field and its manufacturing method can effectively reduce the saturation voltage drop of the IGBT and obtain high power density, can make the IGBT thinner and smaller, integrate a reverse conducting diode, and reduce manufacturing cost.

The invention provides an insulated gate bipolar transistor and a manufacturing method thereof, and the manufacturing method of the insulated gate bipolar transistor comprises the steps: providing a substrate which is provided with a cell region and a virtual cell region; forming a gate structure in the substrate, wherein the gate structure separates the cell region from the virtual cell region; and forming a well region in the substrate of the virtual cellular region by adopting high-energy ion implantation, so that a PN junction is formed between the well region and the substrate, and the top surface of the well region is lower than the top surface of the substrate and is not lower than the bottom surface of the gate structure. According to the technical scheme, the junction depth of thePN junction in the virtual cellular region can be accurately controlled, so that the withstand voltage of the device is improved, the saturation voltage drop of the device is reduced, and the stability and uniformity of the threshold voltage are improved.