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A kind of array substrate and preparation method thereof
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An array substrate and substrate technology, applied in the field of array substrate and its preparation, can solve the problems of low current, affecting device stability, small process window, etc., and achieve the effect of current enhancement, reduction of threshold voltage drift and saturation current fluctuation
Active Publication Date: 2021-09-24
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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However, the current through the channel region is relatively low in the top-gate IGZO TFT, which affects the stability of the device in subsequent operations
[0004] When adopting double-gate design to increase the current passing through TFT devices, ordinary double-gate design needs to consider the impact of the bottom gate and the bottom gate and its insulating layer on the TFT device, so the process window is small; in addition, the double-gate design is also It will affect the distribution characteristics of the TFT channel resistance and the shape of the output characteristic curve
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Embodiment 1
[0048] see figure 1 , a schematic diagram of the first structure of the array substrate provided in Embodiment 1 of the present application.
[0049] In this embodiment, the array substrate includes a substrate 10; a first gate 20 disposed above the substrate 10, a buffer layer 30, an active layer 40, a gate insulating layer 50, a second gate 60, layers Interlayer insulating layer 70 , source 81 , drain 82 , passivation layer 90 and electrode layer 100 .
[0050] In this embodiment, the substrate 10 is a PI substrate, mainly polyimide, and the PI material can effectively improve light transmittance.
[0051] In this embodiment, the first gate 20 is a bottom gate; the first gate 20 is disposed above the substrate 10; the material of the first gate 20 includes but not limited to molybdenum, aluminum, Copper, indium zinc oxide and indium tin oxide, etc.
[0052] In this embodiment, the buffer layer 30 is disposed above the first gate 20 ; the material of the buffer layer 30 in...
Embodiment 2
[0083] see Figure 4 , a schematic diagram of the first structure of the array substrate provided in Embodiment 2 of the present application.
[0084] In this embodiment, the array substrate includes a substrate 10; a first gate 20, a source 81, and a drain 82 disposed on the substrate 10; 81 and the interlayer insulating layer 70 above the drain 82; the active layer 40 disposed above the interlayer insulating layer 70; the gate insulating layer 50 disposed above the active layer 40; disposed on the The second gate 60 above the gate insulating layer 50 ; the passivation layer 90 disposed above the second gate 60 ; and the electrode layer 100 disposed above the passivation layer 90 .
[0085] In this embodiment, the source 81 and the drain 82 are located between the active layer 40 and the substrate 10; the source 81, the drain 82 and the first gate The electrodes 20 are arranged in the same layer and at intervals; the first gate 20 is located between the source 81 and the dr...
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Abstract
The present application provides an array substrate and a preparation method thereof. The array substrate includes a substrate; a first grid is arranged above the substrate; an active layer is arranged above the first grid, and the active layer includes a channel region; the gate insulation layer, arranged above the active layer; the second gate, arranged above the gate insulating layer, and the second gate covers the channel region of the active layer; the source and the drain, the source and the drain are arranged on the active two ends of the layer; wherein, the second gate partially overlaps with the first gate in the direction along the channel region of the active layer. In this application, by designing the horizontal deviation of the bottom gate relative to the top gate, and the change of the width of the bottom gate relative to the top gate, the current passing through the channel region in the array substrate is enhanced, and the threshold voltage drift and saturation current fluctuation are reduced. .
Description
technical field [0001] The present application relates to the field of display technology, in particular to an array substrate and a preparation method thereof. Background technique [0002] Thin Film Transistor (TFT) is the main driving element in flat-panel display devices such as liquid crystal display devices, organic electroluminescent diode display devices, and micro-light-emitting diodes, and is directly related to the development direction of high-performance flat-panel display devices. [0003] As current-driven devices, OLEDs and Micro LEDs require large current passing capabilities, good device stability, and in-plane voltage (Vth) uniformity. Oxide semiconductor thin film transistors such as top-gate IGZO TFTs have high mobility and are more suitable as current-driven display circuits. However, the current through the channel region is relatively low in the top-gate IGZO TFT, which affects the stability of the device in subsequent operations. [0004] When adop...
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Application Information
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