60results about How to "Reduced Threshold Voltage Drift" patented technology

The invention discloses a shift register electrode, a grid electrode driver, an array substrate and a display device, relating to the technical field of liquid crystal display. The electrode comprises a pull-up module, a first pull-down module, a second pull-down module, a pull-up drive module, a pull-down drive module and a reset module, wherein the first pull-down module is used for outputting shut-off signals to an output terminal according to signals input from a clock block signal input terminal and signals input from a reset signal input terminal; the second pull-down module is used for outputting shut-off signals to the output terminal according to signals input from a clock signal input terminal; and the phases of signals input from a signal input terminal are the same with those of the signals input from the clock signal input terminal, and the phases of the signals input from the clock signal input terminal are the same with those of the signals input from the clock block signal input terminal. The shift register electrode can be used for effectively avoiding the defect of threshold voltage drift caused by bias stress on a grid electrode, and can reduce noises generated during outputting voltages.

A technology realizing decreases of capacitance between the adjoining floating gates and of the threshold voltage shift caused by interference between the adjoining memory cells in a nonvolatile semiconductor memory device with the advances of miniaturization in the period following the 90 nm generation. By having the floating gate 3 of a memory cell with an inverse T-shape and the dimension of a part of the floating gate through the control gate 4 and the second insulator film 8 being smaller than the bottom part of the floating gate, the effects of a threshold voltage shift is reduced maintaining the adequate area of the gap between the floating gate 3 and the control gate 4, decreasing the opposing area of the gap of the floating gates 3 underneath the adjoining word lines WL, maintaining the capacity coupling ratio between the floating gate 3 and the control gate, and reducing the opposing area of the gap of the adjoining floating gates 3.

The invention discloses a pixel circuit and a driving method thereof, a display panel including the pixel circuit. The pixel circuit is composed of a light emitting module, a first driving module and a second driving module. The first driving module drives the light emitting module to emit light at a first period under the control of a first scanning signal from a first scanning control terminal; and the second driving module drives the light emitting module to emit light at a second period under the control of a second scanning signal from a second scanning control terminal, wherein the first period and the second period are not overlapped. Because the two driving modules drive the light emitting module alternately to emit light, one driving module enters a recovery stage when the other driving module drives the light emitting module to emit light, so that threshold voltage drifting of driving transistors of all driving modules can be reduced; and service lives of f driving transistors of all driving modules can be prolonged.

The invention discloses a nano-wire field effect transistor comprising a gate electrode, a source region, a drain region, a central region and a gate dielectric layer. The central region is in the core-shell structures which are coaxial; the gate dielectric layer fully surrounds the central region; the gate electrode fully surrounds the gate dielectric layer; the source region and the drain region are respectively arranged on two sides of the central region; the core structure of the central region is made from insulating material, and the shell structure of the central region is made from semiconductor material; the doping type and the doping concentration of the semiconductor material of the shell structure of the central region are adjustable; the lengths of both the core structure and the shell structure and the radii of both the core structure and the shell structure are adjustable; and the materials of the gate dielectric layer, the gate electrode, the source region and the drain region are adjustable. Due to the adoption of the insulating core structure, the off-current of the traditional nano-wire transistor can be reduced effectively, and the current on-off ratio of the devices can be increased. The threshold voltage shifting and the drain induced barrier lowering of the nano-wire field effect transistor are less affected by the short channel effect, and the size reducing performance of the nano-wire field effect transistor is more excellent.

The present invention provides a shift register unit, a gate driving circuit and a display device. The shift register unit comprises: an input module for, in response to turn-on level input via the shift register input terminal, providing turn-on level to the first node and providing turn-off level to the second node; a pull-up module for, in response to turn-on level of the first node, providing a clock signal to the shift register output terminal, and also used for, in response to turn-on level output by the shift register output terminal, providing turn-off level to the second node; a reset module for, in response to turn-on level input via the reset signal input terminal, providing the turn-on level to the second node; and a pull-down module for, in response to turn-on level of the second node, providing turn-off level to the shift register output terminal and the first node.

A thin-film transistor includes: a gate electrode; a source electrode; a drain electrode; a channel layer that is in contact with the source electrode and the drain electrode, and includes oxide semiconductor; and a gate insulating layer that is disposed between the gate electrode and the channel layer, and is in contact with the gate electrode and the channel layer, wherein a region of the gate insulating layer that is in contact with the channel layer is a silicon compound film, and the silicon compound film contains silicon, nitrogen, and oxygen, and is formed by performing plasma processing for introducing, into a film containing silicon and one of nitrogen and oxygen, the other of nitrogen and oxygen.

The present invention discloses a display control circuit including a charging unit, a writing unit, a display unit, a sustaining unit, a first control unit, a second control unit, a first capacitor and a second capacitor, and a method of operating the same. The write unit is used to receive the data signal. The display unit is electrically coupled to the charging unit and the common voltage terminal for displaying the image. The sustaining unit is electrically coupled to the writing unit, the display unit and the second capacitor. The first capacitor is electrically coupled to the first control unit and the writing unit. The second control unit is electrically coupled to the charging unit and the reference level.

The invention provides a grid driving circuit. The grid driving circuit comprises multiple levels of grid driving units, and each level of grid driving unit comprises a first switching element, a second switching element...a ninth switching element. All the levels of grid driving units receive external signals including a first clock signal, a second clock signal, a first steady signal, a second steady signal, first grid driving signals output by the grid driving units higher than the grid driving units for receiving the external signals by two levels and second grid driving signals output by the grid driving units lower than the grid driving units for receiving the external signals by two levels. According to the grid driving circuit, the sixth switching elements and the ninth switching elements are controlled by the first steady signal and the second steady signal to work intermittently, noise, generated by clock hopping, of an output level is reduced, meanwhile, influences on the stability of the grid driving signals from the sixth switching elements and the ninth switching elements are reduced, therefore, the stable grid driving signals can be output, the reliability is high and design is simple.

The invention discloses a method for improving the negative bias temperature stability of the grid of a PMOS device. The method comprises the following steps: forming a grid oxide layer and grid polysilicon, and injecting boron ions; forming a metal tungsten silicide layer on the surface of the grid polysilicon; performing comprehensive fluorinion injection; and diffusing fluorinions into the grid polysilicon through thermal treatment. According to the invention, the stress at the interface of silicon and silicon oxide of the grid can be decreased, the interface state generated due to the existence of hydrogen bonds is reduced, the stability of the interface of the silicon and the silicon oxide can be enhanced, the threshold voltage drift of the PMOS device can be effectively reduced, and the negative bias temperature stability of the grid of the PMOS device is improved.

The invention provides an AMOLED pixel driver circuit and pixel driving method. The AMOLED pixel driver circuit has a 6T1C structure, comprising a first thin film transistor (TFT) (T1), a second TFT (T2) forming mirror relation with the first TFT (T1), a third TFT (T3), a fourth TFT (T4), a fifth TFT (T5), a sixth TFT (T6), a capacitor (c1), and an organic light-emitting diode (OLED) (D1), and receiving a first scan signal (Scan1), a second scan signal (Scan2), a third scan signal (Scan3), a data signal (Data), and a predefined voltage (Vpre). The circuit can effectively compensate the threshold voltage of the driving TFT to solve the problem of unstable current flowing through the OLED caused by the threshold voltage drift. Moreover, the use of double-gate TFT as driving TFT allows designating the threshold voltage of the driving TFT through inputting predefined voltage.

The invention discloses a zinc-oxide-base amorphous oxide semiconductor thin film transistor and a manufacturing method of the zinc-oxide-base amorphous oxide semiconductor thin film transistor. The zinc-oxide-base amorphous oxide semiconductor thin film transistor comprises a substrate, a grid electrode, a grid insulating layer, an active layer, a source electrode and a drain electrode, wherein the grid electrode is formed on the substrate, the grid electrode and the substrate are covered with the grid insulating layer, the active layer is formed on the grid insulating layer and corresponds to the grid electrode, and the two ends of the active layer are covered with the source electrode and the drain electrode respectively; a zinc-oxide-base amorphous oxide semiconductor doped with X and Y serves as the active layer, when the distance between the active layer and the grid insulating layer gradually increases, the content of the X gradually decreases, and the content of the Y gradually increases; the X is one of Cd, In, Sn, Sb, Ti, Pb and As, and the Y is one of Ga, Al, Hf, Ge, Ca and Cu. According to the zinc-oxide-base amorphous oxide semiconductor thin film transistor and the manufacturing method of the zinc-oxide-base amorphous oxide semiconductor thin film transistor, the mobility ratio of a device can be effectively improved, the magnitude of the working current of the device can be effectively improved, the frequency of the phenomenon of threshold voltage drift of the device is reduced, influence of the technology, illumination and gas in the outside world on the device is reduced, and mechanical stability of the device is improved.

A system includes a silicon carbide (SiC) semiconductor device and a hermetically sealed packaging enclosing the SiC semiconductor device. The hermetically sealed packaging is configured to maintain a particular atmosphere near the SiC semiconductor device. Further, the particular atmosphere limits a shift in a threshold voltage of the SiC semiconductor device to less than 1 V during operation.

The invention discloses a nano-sheet ring gate field effect transistor with an asymmetric gate oxygen structure. The nano-sheet ring gate field effect transistor comprises a vertically stacked nano-sheet channel, a double-layer gate oxide wrapping outside the channel, a source and a drain arranged at the two ends of the channel, a double-layer side wall and a substrate arranged at the bottom. Thenano-sheet ring gate field effect transistor is characterized in that the gate oxide is formed by stacking a low dielectric constant material and a high dielectric constant material and is divided into two parts near the drain and the source with half of the channel length as the boundary. The total physical thickness of gate oxygen in the two parts is the same, and the low dielectric constant gate oxide is thinner and the high dielectric constant gate oxide is thicker in the double-layer gate oxides near the drain so as to form the nano-sheet ring gate field effect transistor with the asymmetric gate oxygen structure. Compared with the prior symmetrical type technology, the drain end electric field is lower and the hot carrier effect of the device can be effectively inhibited; it has moreideal on-state and off-state current and higher current switching ratio;and the leakage potential is more stable, the leakage-induced barrier reduction effect is suppressed and the short channel characteristics are improved.

The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of dummy gates over a substrate. The dummy gates extend along a first axis. The method includes forming a masking layer over the dummy gates. The masking layer defines an elongate opening extending along a second axis different from the first axis. The opening exposes first portions of the dummy gates and protects second portions of the dummy gates. A tip portion of the opening has a width greater than a width of a non-tip portion of the opening. The masking layer is formed using an optical proximity correction (OPC) process. The method includes replacing the first portions of the dummy gates with a plurality of first metal gates. The method includes replacing the second portions of the dummy gates with a plurality of second metal gates different from the first metal gates.