Nano-sheet ring gate field effect transistor with asymmetric gate oxygen structure

A field-effect transistor and gate oxide structure technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as device performance degradation, oxide layer damage, failure, etc., and achieve the effect of suppressing DIBL effect and reducing threshold voltage drift

Active Publication Date: 2020-01-14
EAST CHINA NORMAL UNIV +1
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  • Claims
  • Application Information

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Problems solved by technology

[0003] However, since the gate will introduce a strong electric field in the vertical direction, the carriers in the channel will easily gain a lot of kinetic energy, become hot carriers and inject them into the gate oxide layer, causing oxide layer damage and device performance degradation or even failure, that is, thermal load flow effect

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  • Nano-sheet ring gate field effect transistor with asymmetric gate oxygen structure
  • Nano-sheet ring gate field effect transistor with asymmetric gate oxygen structure
  • Nano-sheet ring gate field effect transistor with asymmetric gate oxygen structure

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Embodiment Construction

[0040] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0041] refer to Figure 1-2 , the characteristic of the nanosheet gate-around field effect transistor with asymmetric gate oxide structure is that the gate oxide is stacked by low dielectric constant material and high dielectric constant material, and the channel length is 1 / 2 As the boundary, it can be divided into left and right parts, the left half is close to the drain, and the right half is close to the source, and the physical total thickness of the two parts of the gate oxide is the same. For the part of the gate oxide near the drain, the thickness of the low-k gate oxide is 2nm, and the thickness of the high-k gate oxide is 18nm; for the part of the gate oxide near the source, the low-k gate oxide thickness is The gate oxide thickness is 4nm, and the high-k gate oxide thickness is 16nm. That is, compared to the gate oxide near the source, th...

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Abstract

The invention discloses a nano-sheet ring gate field effect transistor with an asymmetric gate oxygen structure. The nano-sheet ring gate field effect transistor comprises a vertically stacked nano-sheet channel, a double-layer gate oxide wrapping outside the channel, a source and a drain arranged at the two ends of the channel, a double-layer side wall and a substrate arranged at the bottom. Thenano-sheet ring gate field effect transistor is characterized in that the gate oxide is formed by stacking a low dielectric constant material and a high dielectric constant material and is divided into two parts near the drain and the source with half of the channel length as the boundary. The total physical thickness of gate oxygen in the two parts is the same, and the low dielectric constant gate oxide is thinner and the high dielectric constant gate oxide is thicker in the double-layer gate oxides near the drain so as to form the nano-sheet ring gate field effect transistor with the asymmetric gate oxygen structure. Compared with the prior symmetrical type technology, the drain end electric field is lower and the hot carrier effect of the device can be effectively inhibited; it has moreideal on-state and off-state current and higher current switching ratio;and the leakage potential is more stable, the leakage-induced barrier reduction effect is suppressed and the short channel characteristics are improved.

Description

technical field [0001] The invention belongs to the field effect transistor field in semiconductor devices, and in particular relates to a nanosheet ring-gate field effect transistor with an asymmetric gate oxide structure. Background technique [0002] With the continuous development of integrated circuit technology, the feature size of devices has been shrinking according to Moore's law, and has approached the physical limit. The short channel effect, hot carrier effect, and leakage-induced barrier lowering effect have a serious impact on the device, and the degradation of device performance cannot be ignored. In order to improve the short-channel characteristics of devices, many new device structures have emerged one after another. Nanosheet gate-all-around devices have attracted much attention due to their strong gate control capabilities. By vertically stacking nanosheet channels, a larger saturation current can be obtained in a certain area, improving device performanc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L29/423
CPCH01L29/78H01L29/42368H01L29/0665B82Y10/00H01L29/42392H01L29/775H01L29/0673H01L29/78696
Inventor 王萌王昌峰田明孙亚宾石艳玲李小进廖端泉曹永峰
Owner EAST CHINA NORMAL UNIV
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