Integrated circuit layout initialization and optimization method and device, storage medium and equipment

Abstract

The invention discloses an integrated circuit layout initialization and optimization method and device and a storage medium, and belongs to the field of integrated circuit design. The method comprisesthe following steps: analyzing and placing a plurality of IP modules of an integrated circuit in a blank physical layout area of the integrated circuit by using a data flow analysis tool, and dividing IP position grids with the same area on the blank physical layout area at the periphery of each IP module in the plurality of IP modules, and placing an external function module in the area, exceptthe IP position grids, of the blank physical layout area by utilizing a standard unit arrangement too; and performing simulation adjustment on the positions of at least two of the plurality of IP modules, and performing actual position adjustment on the at least two of the plurality of IP modules according to the change of the time sequence snapshot state space size before and after the simulationadjustment. The application of the method is separated from qualitative analysis, the relative positions of the IP modules are analyzed through a time sequence, and the weight is increased, so that the positions of the IP modules are conveniently exchanged, the layout optimization is realized, and the early-stage layout is more scientific and reasonable.

Description

technical field [0001] The present application relates to the technical field of integrated circuit design, in particular to an integrated circuit layout initialization and optimization method, device, storage medium and equipment. Background technique [0002] The main technical points that need to be considered in the initial layout of integrated circuit design include: input and output issues, no matter what chip or module ultimately needs to communicate with the outside of the chip or module, then it is necessary to specify the location of these communication ports, these communication ports The selection of the location of the chip or module will often significantly affect the internal layout of the chip or module; the density problem, when a large amount of logic is concentrated in a small physical area, the area may have a problem of excessive density, and the problem of excessive density is usually easy to cause The problem of insufficient power supply or insufficien...

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Problems solved by technology

[0002] The main technical points that need to be considered in the initial layout of integrated circuit design include: input and output issues, no matter what chip or module ultimately needs to communicate with the outside of the chip or module, then it is necessary to specify the location of these communication ports, these communication ports The selection of the location of the chip or module will often significantly affect the internal layout of the chip or module; the density problem, when a large amount of logic is concentrated in a small physical area, the area may have a problem of excessive density, and the problem of excessive density is usually easy to cause The problem of insufficient power supply or insufficient space for wiring; the problem of rational use of space, because the size and shape of various devices are different, putting them in the layout is like a puzzle, how to make better use of space is a problem; timing convergence Problem, the layout will greatly affect the position of the data sending and receiving nodes, thus greatly affecting the timing, how to make the timing easier to converge is also an important issue; and the problem of low power consumption, in the design of modern low-power integrated circuits usually It is necessary to divide a chip into multiple different power supply areas, use different power supply voltages or cut off the power supply of some areas when needed, so as to achieve the purpose of reducing power consumption, but this brings great challenges to the layout of the chip. challenge

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