LCP packaging substrate, manufacturing method and multi-chip system-in-package structure

A technology for packaging substrates and chips, which is used in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., to achieve the effects of good compatibility, low moisture absorption and water permeability, oxygen permeability, and high integration density

Active Publication Date: 2021-02-09
SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] The existing disclosed technology has not yet used LCP to realize the technical solution of packaging substrate and system-in-package structure that meets the system-in-package requirements of multi-chip, high airtightness requirements, high electromagnetic shielding, and highly reliable interconnection.

Method used

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  • LCP packaging substrate, manufacturing method and multi-chip system-in-package structure
  • LCP packaging substrate, manufacturing method and multi-chip system-in-package structure
  • LCP packaging substrate, manufacturing method and multi-chip system-in-package structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0069] Such as figure 1 As shown, a kind of LCP packaging substrate of the present embodiment comprises:

[0070] n layers of patterned metal circuit layers distributed from the surface to the bottom surface, the first layer of patterned metal circuit layers, the second layer of patterned metal circuit layers, ..., the nth layer of patterned metal circuit layers; the nth layer of patterned The metal circuit layer is provided with a structure for soldering BGA solder balls;

[0071] n-1 layers of insulating dielectric layer between adjacent patterned metal circuit layers; insulating dielectric layer between the first layer of patterned metal circuit layer and the second layer of patterned metal circuit layer, bonded by LCP substrate and LCP The melting point of the LCP adhesive film is lower than that of the LCP substrate; the insulating medium layer between the second patterned metal circuit layer and the nth patterned metal circuit layer is a non-LCP material substrate, and ...

Embodiment 2

[0089] Such as Figure 4 As shown, the present embodiment provides a method for manufacturing the LCP packaging substrate 1 as described in Embodiment 1, comprising the following steps:

[0090] S1, such as Figure 5a As shown, the non-LCP material multilayer interconnection multilayer substrate is manufactured by HDI lamination process; the non-LCP material multilayer interconnection multilayer substrate includes the second patterned metal circuit layer 112 to the n-1th layer patterned metal circuit Layer 113, the underlying large-area metal copper layer for making the nth patterned metal circuit layer 114, the insulating dielectric layer 15 and a plurality of blind holes 14 between adjacent patterned metal circuit layers; the non-LCP material is optional The insulating dielectric layer in the layer-interconnection multilayer substrate is a non-LCP material substrate 153; wherein, the blind holes here are the second type of blind holes, and the depth-to-diameter ratio of the...

Embodiment 3

[0100] Such as Figure 6 As shown, based on the LCP packaging substrate described in Embodiment 1-2, this embodiment provides a multi-chip system-in-package structure 61, including: the LCP packaging substrate 1 described in Embodiment 1-2, and BGA solder balls 2. Chip 3, metal frame 5 and metal cover 6;

[0101] The BGA solder balls 2 are soldered to the bottom surface of the LCP packaging substrate 1, and serve as the external secondary cascade I / O interface of the multi-chip system-in-package structure 61;

[0102] Metal partitions 51 are distributed in the metal enclosure 5; the metal enclosure 5 and the metal partitions 51 are welded to the upper surface of the LCP packaging substrate 1, and the metal cover 6 is welded to the metal enclosure 5 and the metal partitions 51, between the LCP packaging substrate 1 and the metal cover plate 6, a plurality of cavity structures 7 with airtight sealing performance and electromagnetic shielding performance are formed through the m...

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Abstract

The invention discloses an LCP packaging substrate, a manufacturing method and a multi-chip system-in-package structure, and the LCP packaging substrate comprises n graphical metal circuit layers distributed from the surface to the bottom surface, wherein the n graphical metal circuit layers are sequentially a first graphical metal circuit layer, a second graphical metal circuit layer,..., and ann graphical metal circuit layer; insulating dielectric layers which are positioned between the adjacent patterned metal circuit layers; a plurality of blind grooves which are positioned in the insulating medium layer between the first graphical metal circuit layer and the second graphical metal circuit layer, wherein openings of the blind grooves face the first graphical metal circuit layer; and a plurality of blind holes which penetrate through and are connected with the adjacent graphical metal circuit layers. The LCP packaging substrate of the near-airtight packaging structure can meetthe system-level packaging requirements of multiple chips, high airtight requirements, high electromagnetic shielding and high-reliability interconnection.

Description

technical field [0001] The invention relates to the technical field of integrated circuits and chip packaging, in particular to an LCP packaging substrate, a manufacturing method and a multi-chip system-in-package structure, which are used for high-reliability system-in-package for high-frequency applications such as radio frequency, microwave, and millimeter wave. Background technique [0002] With the advancement of semiconductor and integrated circuit technology, the requirements for system integration have been further improved. The current design and manufacture of electronic circuits are moving towards smaller sizes and higher integration densities. Considerable work is carried out in the field of multi-chip packaging. In the advanced packaging form, multiple radio frequency (RF) chips, digital integrated circuit (IC) chips, micro-chip components, etc. are assembled on the packaging substrate through SIP technology, and then integrated into a package. This multi-chip p...

Claims

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Application Information

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IPC IPC(8): H01L23/538H01L23/498H01L23/552H01L21/48H01L21/768
CPCH01L23/49894H01L23/49838H01L23/5386H01L23/552H01L23/49816H01L21/4846H01L21/4853H01L21/76895H01L2224/48091H01L2924/00014
Inventor 舒攀林戴广乾张童童徐诺心易明生赵鸣霄罗洋谢国平龚小林卢军
Owner SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP
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