3D NAND flash programming method

Abstract

The invention provides a 3D NAND flash memory programming method which comprises the following steps: S1) providing a 3D NAND flash memory array, and removing residual charges; S2) gating a bit line where the upper sub-storage module is located; S3) applying a drain voltage to the drain of the to-be-programmed memory cell, and floating the source; S4) applying a programming voltage to the grid electrode of the to-be-programmed storage unit to finish programming; and S5) after the programming of the upper sub-storage module is completed, gating the bit line where the lower sub-storage module islocated under the condition that the upper sub-storage module keeps a programming state, and repeating the step S3) and the step S4) to realize the programming of the lower sub-storage module. According to the 3D NAND flash memory programming method, programming is completed on the basis of the three-time electron collision principle, the grid voltage during programming is far smaller than the grid voltage of an existing tunneling (FN) programming mode, the programming time is short, power consumption can be effectively reduced, interference between adjacent storage units is avoided, and theprogramming efficiency is improved.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a 3D NAND flash memory programming method. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR flash memory and 3D NAND flash memory, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit. [0003] In 3D NAND flash memory, memory cells are arranged in series between the bit line and the ground line. The NAND flash memory with a serial structure has a lower reading speed, but a faster writing speed and erasing speed, so th...

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Problems solved by technology

[0009] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a 3D NAND flash memory programming method, which is used to solve the problems of high programming voltage, high power consumption of flash memory, and interference between adjacent memory cells in the prior art.

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