Circuit and method for detecting failure of open-in loop bus transceiver chip
A bus transceiver and loop technology, which is applied in the field of detecting the fault of an open-loop bus transceiver chip, can solve the problems of switching input state errors, false alarms of open-input actions, etc., and achieve the effect of avoiding the impact.
Active Publication Date: 2022-05-20
XUJI GRP +2
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Problems solved by technology
If the 8-bit bus transceiver chip fails, resulting in an error in the state of the switch input and falsely reporting the input action, it will cause serious consequences
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[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in combination with specific embodiments and with reference to the accompanying drawings. It should be understood that these descriptions are exemplary only, and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.
[0028] Take one switch input as an example. like figure 1 As shown, in the previous open-in circuit, the collector of the secondary side of the optocoupler OP1 is pulled up through the resistor R4. When the open-in signal is not activated, the secondary side of OP1 is not turned on, and the KR1 signal maintains a high level of 3.3V; When the input signal is active, the secondary side of OP1 is turned on, and KR1 becomes...
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The invention relates to a circuit and method for detecting faults of an open-in-loop bus transceiver chip. The input ends of the high-level setting circuit and the low-level setting circuit are connected to the main control unit, and the output ends are connected to the open-in-loop bus for transceiver. Each input terminal of the transceiver chip, the high level setting circuit and the low level setting circuit respectively set the input terminals of the open-in loop bus transceiver chip as high level and low level under the control of the main control unit; The control unit controls the enabling end of the open-in-loop bus transceiver chip, collects the output level of the open-in-loop bus transceiver chip, and judges whether there is a fault in the open-in-loop bus transceiver and the type of fault. The invention realizes the real-time detection of faults of the 8-bit bus transceiver chip by adding a detection circuit to the input data bus circuit, quickly discovers the faults and gives an alarm in time, and avoids serious consequences caused by false alarms or failure to report input data.
Description
technical field [0001] The invention relates to the technical field of signal processing of relay protection devices, in particular to a circuit and a method for detecting faults of open-in loop bus transceiver chips. Background technique [0002] In the signal processing of the relay protection device, a large number of digital input signals are usually designed and opened into the data bus circuit by an 8-bit bus transceiver chip to save the peripheral port resources of the main control chip of the main control unit. The digital input signal plays an important role in data support in the status quantity monitoring and protection logic judgment of relay protection, which puts forward high requirements on the accuracy of the input signal transmitted by the input circuit. If the 8-bit bus transceiver chip breaks down, resulting in an error in the state of the switch input and falsely reporting the input action, it will cause serious consequences. [0003] How to detect the f...
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IPC IPC(8): G05B19/042G01R31/28
CPCG05B19/0423G01R31/2851G05B2219/24036
Inventor 胡翔宇王振华郭震陈号李莎莎龚兴全朱晓军王希栋王瑞靳鹏飞
Owner XUJI GRP