Device for realizing last state of general server power supply and recovery method
A server and power supply technology, which is applied in the field of laststate power supply devices for general servers, and can solve problems such as dependence on the CPU platform, power supply laststate unable to save state, and inability to expand general-purpose servers, etc.
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Embodiment 1
[0029]figure 1 It is a schematic structural diagram of a device for realizing the last state of a universal server power supply in an embodiment of the present invention. Such asfigure 1 As shown, the embodiment of the present invention provides a device for realizing the last state of a universal server power supply, and the device includes:
[0030]Central processing unit 1, said central processing unit 1 includes x86 architecture and arm architecture;
[0031]Power supply 2, said power supply 2 is connected to said central processing unit 1;
[0032]A power management chip 3, the power management chip 3 is connected to the power source 2 and is in communication connection with the central processing unit 1;
[0033]The storage chip 4 is arranged on the periphery of the power management chip 3 and is communicatively connected with the power management chip 3.
[0034]Further, the storage chip 4 is a non-volatile storage chip 4.
[0035]Specifically, last state literally means the last state, and he...
Embodiment 2
[0037]The embodiment of the present invention also provides a recovery method for realizing the 2last state of the universal server power supply, such asfigure 2 As shown, the method includes:
[0038]Step 110: Obtain the operating state of the central processing unit 1, where the operating state includes a power-on state and a power-off state;
[0039]Step 120: According to the operating status, the central processing unit 1 sends a status indication signal to the power management chip 3;
[0040]Step 130: After receiving the state indication signal, the power management chip 3 rewrites the last state state through the access interface of the storage chip 4;
[0041]Step 140: When the power supply 2 is unexpectedly powered down and recovered, the power management chip 3 reads the laststate state;
[0042]Step 150: According to the read last state, the power management chip 3 controls the on-off state of the power source 2, where the on-off state of the power source 2 includes on and off;
[0043]Ste...
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