An fpga distributed power supply network with self-test and adjustable function
A distributed power supply and self-testing technology, applied in the field of FPGA, can solve the problems of increased difficulty of frequency compensation of power supply network, difficulty in adapting to the scale of FPGA storage array, low output current of low-dropout linear regulator, etc. Improve reliability and scalability, reduce the effect of voltage errors
Active Publication Date: 2022-05-31
WUXI ESIONTECH CO LTD +1
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[0004] However, the output current of common low-dropout linear regulators is small, which is difficult to meet the needs of actual use, and increasing the output current usually makes the frequency of parasitic poles lower. With the increasing scale of FPGA storage arrays and the improvement of chip manufacturing processes Continuously shrinking, in order to ensure the stability of the low dropout linear regulator loop, the difficulty of frequency compensation of the entire power supply network increases, and it is difficult to adapt to the scale of the existing FPGA storage array
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[0021] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.
[0030] The above is only the preferred embodiment of the application, the present invention is not limited to the above embodiments. It is understandable that this
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Abstract
The invention discloses an FPGA distributed power supply network with a self-test and adjustable function, and relates to the field of FPGA technology. The distributed power supply network includes several independent power supply area blocks, and a bandgap reference module is connected to each power supply area block. The low-dropout linear regulators provide reference voltages. The low-dropout linear regulators in each power supply area block are respectively powered by the drive array output. At the same time, the voltage of each low-dropout linear regulator is drawn to the outside through the test circuit for testing and passed The fine-tuning signal generation circuit is adjusted accordingly. The distributed power supply design effectively reduces the current load of a single low-dropout linear regulator and ensures the stability of the power network. The built-in test circuit and fine-tuning signal generation circuit can reduce the block size of different power supply areas The voltage error caused by the process and load between the chips solves the design bottleneck caused by the continuous shrinking of the chip manufacturing process and the continuous increase of the chip scale, and improves the reliability and scalability of the chip.
Description
An FPGA-based Distributed Power Network with Self-Test Adjustable Function technical field The present invention relates to FPGA technical field, especially a kind of distributed power supply with self-test adjustable function of FPGA network. Background technique SRAM (Static Random Access Memory, static random access memory) is a kind of It can save the data stored in it without refreshing the circuit. It is widely used in FPGA storage arrays. Among them, the SRAM cell with the six-tube structure as shown in FIG. 1 is the most common. At present, in FPGA circuit, low dropout linear voltage regulator is usually used to realize power supply to SRAM cell, low dropout voltage A linear regulator is a DC / AC regulator whose input voltage is greater than the output voltage. It has stable output voltage and low output voltage. With the characteristics of ripple and low noise, the low dropout linear regulator also has the advantages of small package size, few external co...
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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCG05F1/56
Inventor 徐玉婷耿杨何小飞张艳飞董宜平
Owner WUXI ESIONTECH CO LTD
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