38results about How to "Reduce current load" patented technology

A precharge circuit of a semiconductor memory apparatus includes a first precharge unit and a second precharge unit. The first precharge unit applies a first core voltage to a pair of local input / output lines, in response to a first precharge signal, to precharge the pair of local input / output lines. The second precharge unit applies a clamp voltage, which is generated using a first supply voltage, to the pair of local input / output lines, in response to the first precharge signal, to precharge the pair of local input / output lines.

The invention relates to a lossy triphase low-pass filter (34) having a filter choke (18), a filter capacitor (20), and an attenuation element (32) per phase of said low-pass filter (34), wherein one filter capacitor (20) and one attenuation element (32) each are electrically connected in series. According to the invention, two diodes (36, 38) are provided as attenuation elements, which are electrically connected to each other in an anti-parallel manner. In this manner a lossy triphase low-pass filter (34) is obtained, the power loss of which is significantly reduced without any loss of the attenuation effect.

#CMT# # / CMT# The device has an input unit provided with two input connectors (E1) for connection of direct current supply voltage unit (Un). Voltage measuring devices (R1-R4) are provided for measuring voltage between input connectors and output connectors of a boost-converter (12). A microcontroller (14) is provided with two inputs (EM1, EM2), which are coupled with voltage measuring devices. The micro-controller is designed such that voltage (Uzw) between output connectors of the converter is controlled to a value, which depends upon a value of voltage (Ugl) between the input connectors of converter. #CMT#USE : # / CMT# Electronic pre-switching device for operation of two different types of discharge lamps. #CMT#ADVANTAGE : # / CMT# The micro-controller is designed such that voltage between output connectors of the boost converter is controlled to the value, which depends upon the value of voltage between the input connectors, thus operating the pre-switching device at reduced power losses, and reducing electronic interferences, during operation of the discharge lamps. The device is designed such that the voltage stroke between the input and the output of the boost converter is reduced, thus increasing the efficiency of the converter, and reducing power load in all components of the pre-switching device such that compact components are used in the pre-switching device, and hence reducing the cost and space required for the pre-switching device. #CMT#DESCRIPTION OF DRAWINGS : # / CMT# The drawing shows a schematic circuit diagram of an electronic pre-switching device. E1 : Input connectors EM1, EM2 : Inputs R1-R4 : Voltage measuring devices Ugl, Uzw : Voltage Un : Direct current supply voltage unit 12 : Boost-converter 14 : Microcontroller.

The invention relates to a high-efficiency DC-DC converter which comprises a first full bridge, a second full bridge and a third full bridge, wherein the first full bridge, the second full bridge and the third full bridge are identical in structure. Bridge arms of the full bridges are all connected with an input power supply in parallel, and the difference between the phase position of the first full bridge, the phase position of the second full bridge and the phase position of the third full bridge is 120 degrees. An on-bridge tube of the advancing bridge arm is driven first, and an under-bridge tube of the advancing bridge arm is driven half a period later than the on-bridge tube. An on-bridge tube of the lagging bridge arm is driven X periods of time later than the on-bridge tube of the advancing bridge arm. Due to the fact that in the five states for energy transmission at each order, at least one phase and at most two phases of the first full bridge, the second full bridge and the third full bridge work, in the whole process, currents are shared by the full bridges which work simultaneously, the current load of each full bridge is reduced, as a result, circuit loss is lowered effectively, the current limiting problem generated during power amplification through a traditional full bridge is solved, and the current resisting requirement of a device is also lowered. Due to the fact that the soft switching state is realized in a part of period, switching tube loss caused by the hard switching state of a switching tube is lowered, and the conversion efficiency of the DC-DC converter is improved.

The invention provides a QLED, comprising a first electrode, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer and a second electrode arranged in sequence, and the light-emitting layer is composed of a quantum dot light-emitting material and a mixed transport material The mixed transport material is a hole transport material and an electron transport material, and the hole transport material and the electron transport material form a double continuous network structure in the light-emitting layer, and the quantum dot light-emitting material is dispersed in the In the bicontinuous network structure described above.

The invention discloses an FPGA distributed power supply network with a self-test and adjustable function, and relates to the field of FPGA technology. The distributed power supply network includes several independent power supply area blocks, and a bandgap reference module is connected to each power supply area block. The low-dropout linear regulators provide reference voltages. The low-dropout linear regulators in each power supply area block are respectively powered by the drive array output. At the same time, the voltage of each low-dropout linear regulator is drawn to the outside through the test circuit for testing and passed The fine-tuning signal generation circuit is adjusted accordingly. The distributed power supply design effectively reduces the current load of a single low-dropout linear regulator and ensures the stability of the power network. The built-in test circuit and fine-tuning signal generation circuit can reduce the block size of different power supply areas The voltage error caused by the process and load between the chips solves the design bottleneck caused by the continuous shrinking of the chip manufacturing process and the continuous increase of the chip scale, and improves the reliability and scalability of the chip.