A phase-adjustable annular
voltage-controlled oscillator based
on resistance feedforward comprises four differential current starvation type
delay units which are identical in structure and connected in a loop mode, the positive output end and the negative output end of the first differential current starvation type
delay unit are connected with the negative input end and the positive input end of the second differential current starvation type
delay unit respectively, and the first differential current starvation type
delay unit is connected with the second differential current starvation type
delay unit. The positive and negative output ends of the second, third and fourth differential current starvation type delay units are respectively connected with the positive and negative input ends of the third, fourth and first differential current starvation type delay units to form a main path loop; the positive and negative output ends of the first and fourth differential current starvation type delay units are respectively connected with the positive and negative feed-forward ends of the third and second relative differential current starvation type delay units; the positive and negative output ends of the second and third differential current starvation type delay units are respectively connected with the negative and positive feed-forward ends of the fourth and first relative differential current starvation type delay units to form a feed-forward path loop; and each differential current starvation type
delay unit is additionally provided with bias
voltage ends of a PMOS (P-channel
Metal Oxide Semiconductor)
transistor and an NMOS (N-channel
Metal Oxide Semiconductor)
transistor. According to the invention, through the
resistor feed-forward structure, the output frequency of the oscillator is integrally improved, the resistance value of the feed-forward
resistor is adjusted through the control word, a GHz-level
clock signal is output, and the oscillator has a relatively wide frequency adjustment range, can be used for initial deflection calibration of phase mismatch among multiple channels in a multi-phase
clock application scene, and is beneficial to reducing the calibration cost.