FPGA distributed power supply network with self-test adjustable function

Abstract

The invention discloses an FPGA distributed power supply network with a self-test adjustable function, and relates to the technical field of FPGAs, the distributed power supply network comprises a plurality of independent power supply area blocks, a band-gap reference module is connected with a low dropout regulator in each power supply area block to provide reference voltage, The low-dropout linear voltage regulator in each power supply area block outputs power supply through the driving array, and the voltage of each low-dropout linear voltage regulator is led to the outside through the testcircuit to be tested and is correspondingly adjusted through the fine adjustment signal generation circuit. The distributed power supply design effectively reduces the current load of a single low-dropout linear regulator, the stability of a power supply network is ensured, and the built-in test circuit and the built-in fine tuning signal generation circuit can reduce the voltage error caused bythe process and load between different power supply area blocks. The design bottleneck caused by continuous reduction of the chip manufacturing process and continuous increase of the chip scale is solved, and the reliability and expandability of the chip are improved.

Description

Technical field [0001] The present invention relates to the field of FPGA, in particular a distributed power supply network with self-test adjustable functionality. Background technique [0002] SRAM (Static Random Access Memory, Static Random Access Memory) is a memory with a static access function. It does not require a refresh circuit to save the internal stored data, which is widely used in the FPGA storage array, especially figure 1 The SRAM unit of the six-tube structure shown is most common. [0003] At the FPGA circuit, the low pressure difference linear regulator is usually used to power the SRAM unit, the low pressure difference linear regulator is a DC AC regulator that is greater than the output voltage, which has an output voltage stable and low output. The characteristics of ripple and low noise, the low pressure difference linear regulator also has a small package size, less external components, usually only one to 2 external bypass capacitors, and therefore widel...

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Problems solved by technology

[0004] However, the output current of common low-dropout linear regulators is small, which is difficult to meet the needs of actual use, and increasing the output current usually makes the frequency of parasitic poles lower. With the increasing scale of FPGA storage arrays and the improvement of chip manufacturing processes Continuously shrinking, in order to ensure the stability of the low dropout linear regulator loop, the difficulty of frequency compensation of the entire power supply network increases, and it is difficult to adapt to the scale of the existing FPGA storage array

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