Low-complexity FIR filter reconfigurable architecture based on secret bit information embedding system

A bit information, low-complexity technology, applied in impedance networks, digital technology networks, electrical components, etc., can solve problems such as reducing throughput bits, increasing hardware costs and system delays, and increasing coefficient multipliers to achieve optimal utilization. , easy to cascade, save hardware consumption effect

Pending Publication Date: 2021-03-26
NANJING UNIV OF AERONAUTICS & ASTRONAUTICS
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Problems solved by technology

[0005] (3) No degradation in throughput (bandwidth or bits per transfer)
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  • Low-complexity FIR filter reconfigurable architecture based on secret bit information embedding system
  • Low-complexity FIR filter reconfigurable architecture based on secret bit information embedding system

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[0036] The present invention will be further described below with reference to the accompanying drawings.

[0037] figure 1 For the present invention, the present invention is based on a low complexity FIR filter reconstructed new architecture, including: lookup table unit, pre-processing unit, processor unit, select delay adding unit .

[0038] The lookup table unit will perform 15-bit CSD encoding 14-bit fixed-point decimal value, further divided into three CSs, ie [1 0 1], [1 0 -1], and [1]. And determine the symbol of each CS to serve as a selection signal of the adder or subtractor; and record the shift of each CS. Finally, the selection signal of the selector, add (subtract) the device, the programmable shift signal is presented.

[0039] The main task of the pre-processing unit is to generate C i,j , C i,j ∈ {[1], [1 0 -1], [1 0 1]}. The input X is converted into Z 1 = X, Z 2 = X- (x >> 2), z 3 = X + (x >> 2) three forms. Compared with other conventional architecture, the ...

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Abstract

The invention provides a low-complexity finite-length unit impulse response (FIR) filter reconfigurable new architecture based on a secret bit information embedding system. The FIR filter reconfigurable architecture is based on a transposed direct form FIR filter structure, and aims to reduce the area and time delay consumption of the reconfigurable FIR filter. The method comprises the following steps: firstly, carrying out regular symbolic coefficient (CSD) encoding on the magnitude of a coefficient, and further dividing the CSD into a combination of six sub-expressions (CS); replacing multiplication operation by sharing, selecting, shifting and adding (subtracting) of CS; and finally, connecting a previous tap and a next tap by using a selective delay addition (subtraction) unit to realize the reconfigurable FIR filter. According to the invention, the LUT consumption quantity is effectively reduced, and the system time delay is reduced.

Description

technical field [0001] The invention relates to the technical field of reconfigurable architecture of FIR filters, in particular to a reconfigurable architecture of low-complexity FIR filters based on secret bit information embedding system. Background technique [0002] In many applications, the sender transmits secret information in addition to data information to the receiver. Only designated recipients can obtain secret information, while other ordinary recipients can also normally receive data information. These secrets could be watermarks, certification labels, product IDs or spectrum licenses for Dynamic Spectrum Access. In these cases, the secret information should be embedded in the transmission process to better hide the secret information. Putting secret information on a separate channel defeats the purpose of watermarking. Therefore, usually secret information is embedded in the physical layer of the wireless communication system. This embedding process shoul...

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Application Information

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IPC IPC(8): H03H17/02
CPCH03H17/0223
Inventor 吴佩佩陈佳嘉
Owner NANJING UNIV OF AERONAUTICS & ASTRONAUTICS
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