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GaN HEMT and Si-CMOS monolithic integration method

A monolithic integration and epitaxial layer technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of large loss, high cost, and large volume, and achieve low cost, superior performance, and small chip area.

Pending Publication Date: 2021-05-07
深圳市汇芯通信技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

As mentioned above, two independent chips need to be manufactured, packaged, tested and sold separately, so the total product size is large, the loss is large, and the cost is high

Method used

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  • GaN HEMT and Si-CMOS monolithic integration method
  • GaN HEMT and Si-CMOS monolithic integration method
  • GaN HEMT and Si-CMOS monolithic integration method

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Embodiment Construction

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0017] It should be noted that all directional indications (such as up, down, left, right, front, back, inside, outside, top, bottom...) in the embodiments of the present invention are only used to explain As shown in the figure), if the relative positional relationship between the various components, etc., if the specific posture changes, the directional indication will also change accordingly.

[0018] like figure 1 As shown, the embodiment of the present invention provides a GaN HEMT and Si-CMOS monolithic integration method, comprising the following steps:

[0019] Step S100, epitaxially growing a GaN epitaxial layer structure on a silicon substrate;

[0020] Step S200, etching the GaN epitaxial layer structure to form a GaN HEMT device region and a Si-CMOS device region;

[0021] Step S300, preparing a GaN HEMT in the GaN HEMT device region;

[0...

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Abstract

The invention provides a GaN HEMT and Si-CMOS monolithic integration method. The method comprises the steps of S100, epitaxially growing a GaN epitaxial layer structure on a silicon substrate; S200, etching the GaN epitaxial layer structure to form a GaN HEMT device region and a Si-CMOS device region; S300, preparing a GaN HEMT in the GaN HEMT device region; and S400, preparing the Si-CMOS in the Si-CMOS device region. The GaN HEMT device region and the Si-CMOS device region are formed by etching the GaN epitaxial layer structure, so that the GaN HEMT and the Si-CMOS are prepared on the same substrate, integration of the GaN HEMT and the Si-CMOS on the same chip is achieved, and the overall chip formed by monolithic integration of the GaN HEMT and the Si-CMOS is small in area, excellent in performance and low in cost.

Description

【Technical field】 [0001] The invention relates to the technical field of semiconductor technology, in particular to a GaN HEMT and Si-CMOS monolithic integration method. 【Background technique】 [0002] At present, the radio frequency power amplifier and its control chip or the low noise amplifier and its control chip are manufactured separately. That is, the radio frequency power amplifier and its control chip or the low noise amplifier and its control chip are two independent chips. As mentioned above, two independent chips need to be manufactured, packaged, tested and sold separately, so the total product size is large, the loss is large, and the cost is high. [Content of the invention] [0003] The object of the present invention is to provide a GaN HEMT and Si-CMOS monolithic integration method. [0004] In order to achieve the above object, the present invention provides a GaN HEMT and Si-CMOS monolithic integration method, the method includes the following steps: S...

Claims

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Application Information

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IPC IPC(8): H01L21/8258H01L27/06
CPCH01L21/8258H01L27/0617
Inventor 樊永辉许明伟樊晓兵
Owner 深圳市汇芯通信技术有限公司
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