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Programming operation method and device of memory

An operation method and a technology of an operation device, which are applied in the field of memory, can solve problems such as program interference, migration, and the inability to effectively reduce channel charge density, and achieve the effects of reducing electron density and program interference

Active Publication Date: 2021-05-14
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, as the number of stacked layers in 3D NAND memory increases, the length of the channel becomes longer and longer, so that the electrons in the channel farther away from the source terminal are subjected to a limited electric field force and cannot efficiently migrate to the source terminal. As a result, the channel charge density cannot be effectively reduced in the pre-charging stage, and the programming disturbance is serious.

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  • Programming operation method and device of memory
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  • Programming operation method and device of memory

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Embodiment Construction

[0057] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments. In particular, the following examples are only used to illustrate the present invention, but not to limit the scope of the present invention. Likewise, the following embodiments are only some of the embodiments of the present invention but not all of them. All other embodiments obtained by those skilled in the art without creative efforts all fall within the protection scope of the present invention.

[0058] In addition, the directional terms mentioned in the present invention, such as [top], [bottom], [front], [back], [left], [right], [inside], [outside], [side], etc., only is the direction of reference to the attached drawings. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention. In the various figures, structurally similar elements are denoted by the same...

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Abstract

The invention relates to a programming operation method and device of a memory; the memory comprises a first input end, a first storage string, a second storage string and a second input end which are sequentially arranged in a preset direction; the first storage string comprises a plurality of first storage units which are connected in series, and the second storage string comprises a plurality of second storage units which are connected in series. The programming operation method comprises the steps of performing pre-charging of programming operation, including providing a first preset voltage for a first input end and providing a second preset voltage for a gate layer of a first memory cell so as to pre-charge a channel in a first memory string; performing programming operation to program the second storage unit, so that when the programming operation is carried out on the second storage string, the charge density of a channel can be effectively reduced in the pre-charging stage of the programming operation, and the programming interference is further reduced.

Description

【Technical field】 [0001] The invention relates to the technical field of memory, in particular to a memory programming operation method and device. 【Background technique】 [0002] As technology develops, the semiconductor industry is constantly looking for new production methods to allow each memory die in a memory device to have a greater number of memory cells. Among them, 3D NAND memory has become a cutting-edge three-dimensional memory technology with great development potential due to its advantages of high storage density and low cost. [0003] At present, when programming 3D NAND memory, a large forward bias voltage is usually provided to the source terminal located at the source side of the channel during the pre-charging stage of the programming operation to attract electrons in the channel to migrate to the source terminal. and is eventually absorbed by this source terminal, thereby reducing the channel charge density. [0004] However, as the number of stacked l...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/14G11C16/10H01L27/11529H01L27/11551H01L27/1157H01L27/11578H10B41/20H10B41/41H10B43/20H10B43/35
CPCG11C5/147G11C16/10H10B41/41H10B41/20H10B43/35H10B43/20
Inventor 李楷威游开开贾建权李姗张安
Owner YANGTZE MEMORY TECH CO LTD
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