Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Scheduling method for directed acyclic graph tasks in heterogeneous multi-core processor system

A multi-core processor and directed acyclic graph technology, applied in the field of computer systems, can solve the problems of not considering the impact and low processor utilization

Inactive Publication Date: 2021-05-18
NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
View PDF2 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the current table scheduling algorithm does not consider the impact of the communication time between processor cores on the entire task scheduling time, so there is still the problem of low processor utilization

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Scheduling method for directed acyclic graph tasks in heterogeneous multi-core processor system
  • Scheduling method for directed acyclic graph tasks in heterogeneous multi-core processor system
  • Scheduling method for directed acyclic graph tasks in heterogeneous multi-core processor system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0035] A method for scheduling directed acyclic graph tasks in a heterogeneous multi-core processor system. The heterogeneous multi-core processor system used by the method is as follows: figure 1 shown. The system consists of a main processor and M heterogeneous coprocessors such as ARM, DSP, and FPGA. The main processor is responsible for data input and collection of coprocessor processing results, and different types of heterogeneous processors are responsible for performing calculation tasks. The set of coprocessors is denoted as P={p 1 ,p 2 ,...,p M}, processor p m The calculation frequency is f m , which represents the number of bits of tasks that the processor can perform per second. Processor topology composed of all coprocessors figure 2 The fully connected undirected graph representation shown, the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a scheduling method for directed acyclic graph tasks in a heterogeneous multi-core processor system, and belongs to the technical field of computer systems. The method comprises the following steps: acquiring parameters; constructing a priority list of sub-tasks in the DAG; iteratively solving a parameter alpha; and updating the parameter alpha according to a scheduling result obtained by each iteration, terminating the iteration after a judgment condition is met, and outputting a task scheduling result. According to the invention, the task scheduling scheme is iteratively solved by improving the earliest completion time algorithm in the heterogeneous computing environment, the idle period caused by the communication overhead between the processors is reduced, the computing resources of the heterogeneous processors are fully utilized, the completion time of the whole task is shortened, and the real-time requirement of the task is met.

Description

technical field [0001] The invention belongs to the technical field of computer systems, and in particular relates to a scheduling method for directed acyclic graph tasks in a heterogeneous multi-core processor system. Background technique [0002] Real-time embedded systems are widely used in automotive and avionics industries, consumer electronics, Internet of Things, military applications, and industrial control systems. The embedded systems market is expected to reach $114 billion by 2024, and real-time software is expected to grow 12% annually. With the increasing complexity of various applications, the real-time requirements for processors to perform calculations, image processing, digital signal processing and other tasks are gradually increasing, but the traditional method of increasing the clock frequency of single-core processors cannot meet the task requirements. Multi-core processors are widely used in parallel processing systems. Multi-core processor systems c...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F9/48G06F9/50
CPCG06F9/5027G06F9/4843G06F9/4881G06F9/4806
Inventor 赵云林肖辉张博刘永辉王蕾
Owner NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products