Multilayer hybrid semiconductor package

Abstract

The invention relates to a multilayer hybrid semiconductor package, which comprises a base and a sliding protection mechanism, wherein the middle part of the top end of the base is provided with an embedding groove, the middle part of the embedding groove is provided with a chip seat, the two sides of the bottom end of the chip seat are connected with fixing rings, the inner walls of the fixing rings are attached with an erection mechanism, a semiconductor chip is placed on the inner wall of the chip seat, and connecting wire boards are arranged at the top end of the semiconductor chip at equal intervals. The multilayer hybrid semiconductor package is provided with the chip seat, and the chip seat is fixedly connected with the fixing ring, so that when a user needs to install the chip seat in the embedding groove or prepares to additionally arrange the multilayer chip seat due to the packaging requirement, the user can sleeve the outer wall of the periphery of the hollowed-out groove with the fixing ring through the fixed connection formed between the fixing ring and the chip seat, so that the beneficial effect of forming multilayer erection on the chip seat is achieved, and the user can use the multilayer structure to improve diversity and diversification of different degrees for the packaging operation of a semiconductor at the moment.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a multilayer hybrid semiconductor packaging. Background technique [0002] Semiconductor packaging refers to the process of processing the tested wafers according to the product model and functional requirements to obtain independent chips. The packaging process is: the wafer from the wafer front-end process is cut into small chips after the dicing process, and then the cut chips are glued to the corresponding small island of the substrate frame, and then the ultra-fine Metal wires or conductive resin connect the bonding pads of the chip to the corresponding pins of the substrate to form the required circuit; then the independent chip is packaged and protected with a plastic case, and a series of operations are performed after the plastic package. After completion, the finished product is tested, usually after inspection, testing, packaging and other processes, a...

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to provide a kind of multi-layer hybrid semiconductor package, to solve the existing semiconductor package proposed in the above-mentioned background technology usually because it itself does not have a multi-layer hybrid structure or its own structure is not perfect, which leads to the semiconductor in the package. The practicality and diversification of itself are reduced in the operation, which brings inevitable trouble and cumbersome problems to users

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