Chip simulation verification method, system and device and storage medium

Abstract

The invention provides a chip simulation verification method, system and device and a storage medium, and the method comprises the steps: obtaining a chip verification configuration file, wherein the chip verification configuration file comprises operator parameters and test parameters, the operator parameters comprise configuration parameters of each operator, and the test parameters comprise operation modes, the operation mode comprises a single operator test and/or a chip model overall test; generating random excitation data according to the chip verification configuration file; inputting the random excitation data into a corresponding simulation operator or simulation algorithm model, and obtaining a simulation result; generating an input file of the input chip according to the random excitation data and the input data format requirement of the chip; inputting the input file into the chip, and obtaining an output result of the chip; comparing the simulation result with an output result of the chip to obtain a chip verification result. The method is applied to simulation and verification of the neural network model reasoning chip, and rapid function verification of different neural network models and operators is achieved.

Description

technical field [0001] The invention relates to the technical field of data processing, in particular to a chip simulation verification method, system, equipment and storage medium. Background technique [0002] Chip verification has always been an industry that continues to develop with chip design, and functional verification occupies a lot of time in the overall design cycle of chips. In recent years, with the improvement of computer computing power, various algorithm models for different scenarios emerge in an endless stream. On the one hand, different network models are designed and iterated according to the actual needs of the industry. On the other hand, these models are converted into computing power supported by hardware. , In the reasoning stage of the model, it is the core competitiveness of many companies to write the trained neural network model algorithm on the chip to achieve real-time reasoning and low power consumption. Chips are the hardware foundation of ...

AI Technical Summary

Problems solved by technology

However, the executable file here is implemented based on C, and a large number of test case tests will perform frequent compilation operations. In addition, while improving the confidentiality of the source code, the verification process is also split into two steps, which reduces the flexibility of verification.

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