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Data stream processing method for efficiently executing matrix addition on GPDPU simulator

A technology of matrix addition and processing method, which is applied in the fields of electrical digital data processing, digital data processing components, machine execution devices, etc. Execution efficiency and the effect of improving utilization

Pending Publication Date: 2021-08-13
北京睿芯高通量科技有限公司
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Problems solved by technology

[0006] Chinese patent CN110941451A discloses a data flow processor instruction mapping method, system, and device, which describes the data flow processor and its related instructions, but does not elaborate on the specific design method for efficient calculation of matrix addition
[0007] In summary, matrix addition has the characteristics of more memory access than calculation operations, and the existing technology does not elaborate on the implementation and optimization of matrix addition, a common and common operator, on GPDPU

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  • Data stream processing method for efficiently executing matrix addition on GPDPU simulator

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0024] The present invention provides a kind of data stream processing method that efficiently executes matrix addition on GPDPU simulator, and it comprises:

[0025] Start the emulator of GPDPU;

[0026] Use DMA to read data and instructions from the memory and input them to the SPM, where the data is the matrix A and matrix B to be summed, and the instruction is the data stream instruction that drives the GPDPU to perform matrix addition operations;

[0027...

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Abstract

The invention discloses a data stream processing method for efficiently executing matrix addition on a GPDPU simulator. The method comprises the following steps: starting the GPDPU simulator; adopting a DMA for reading data and an instruction from a memory and inputting the data and the instruction into a SPM, wherein the data are a matrix A and a matrix B to be summed, and the instruction is a data flow instruction for driving the GPDPU to execute matrix addition operation; according to the sizes of the matrix A and the matrix B, averagely dividing the matrix A and the matrix B into M sub-matrixes according to rows; enabling each sub-matrix to correspond to one task, and enabling data in each sub-matrix to correspond to one subtask; configuring N PEs for each subtask, wherein each PE corresponds to 1 / N of the internal data volume of the sub-matrix; configuring an access address of a load instruction in the data flow instruction for each PE; enabling the N PEs corresponding to each subtask to adopt an SIME32 mode to execute the data stream instruction so as to complete the addition operation, wherein the M tasks are executed in parallel; and outputting a result matrix obtained by adding the matrix A and the matrix B.

Description

technical field [0001] The invention relates to the operation of matrix addition, in particular to a data stream processing method for efficiently executing matrix addition on a GPDPU simulator. Background technique [0002] In the research of processor architecture, the simulator occupies a pivotal position. Simulator technology runs through the entire system development process: in the early stage of development, the simulator is used for coarse-grained simulation to select the optimal solution; during the development period, various microstructures are verified; in the later stage of development, the simulator is used for software development and testing. After the entire hardware system is put into operation, it is also possible to obtain profiling information based on the simulator that cannot be obtained solely by relying on the hardware system, and perform bottleneck analysis and performance optimization on the system. In the process of basic computer research, simu...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F7/501G06F17/16
CPCG06F9/3005G06F7/501G06F17/16
Inventor 罗鑫王达吴冬冬
Owner 北京睿芯高通量科技有限公司
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