A Parallel Solution Method Based on LSI Partition
A large-scale integrated circuit and circuit technology, which is applied in the field of solving sparse matrix LU decomposition, can solve the problems of circuit simulation performance bottleneck, time-consuming, high complexity of solving sparse linear equations, and achieves the goal of improving memory access efficiency and computing efficiency. Effect
Active Publication Date: 2022-05-24
北京华大九天科技股份有限公司
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Problems solved by technology
The solution of linear equations adopts the direct method, that is, LU decomposition and back-substitution solution, while the solution of sparse linear equations is complex and time-consuming
Since the solution of sparse linear equations occupies the largest proportion of the total time of circuit simulation, it becomes the performance bottleneck of circuit simulation
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[0034] The following preferred embodiments of the present invention in conjunction with the accompanying drawings will be described, it should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to qualify the present invention.
[0035] In an embodiment of the present invention, the method of diagonal edge (BBD) matrix division is employed, the method of dividing the sparse matrix representing the entire circuit into only diagonal blocks and the lower and right sides are non-zero elements, other positions are zero matrix, such as a schematic diagram of division Figure 1 as shown.
[0036] Figure 2 For a parallel solution method based on a large-scale integrated circuit division according to the present invention flowchart, the following will refer to Figure 2 , a parallel solution method based on the division of large-scale integrated circuits of the present invention is described in detail...
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A parallel solution method based on the division of large-scale integrated circuits, comprising the following steps: 1) performing circuit division to establish a layered BBD structure of a circuit matrix; Perform parallel LU decomposition and Schur complement calculation; 3) Perform LU decomposition on the top-level matrix; 4) Perform right-end term calculation and back-substitution solution on the top-level matrix; 5) Perform right-end term calculation on each layer in order from high to low Calculation and back-substitution solution; 6) Back-substitution solution to the underlying matrix. The invention can divide large-scale circuits / matrix into blocks, which improves the memory access efficiency, and can also decompose and solve back-substitution structures in parallel to improve the calculation efficiency.
Description
Technical field [0001] The present invention relates to the field of EDA circuit simulation techniques, in particular to a method of solving the sparse matrix LU decomposition. Background [0002] In the process of circuit transient simulation, Newton Lafson's iterative method is used to solve a large-scale nonlinear system of equations at each time point. For each step of Newton's Lafson iteration, solve the system of linear equations Ax=b. The solution of the linear equation system adopts the direct method, that is, LU decomposition and back-generation solution, while the sparse linear equation system is complex and time-consuming. Because the solution of the sparse linear system of equations occupies the largest proportion of the total time of circuit simulation, it becomes the performance bottleneck of circuit simulation. [0003] Therefore, how to efficiently perform LU decomposition of sparse matrices and perform back-generation solution has become an urgent problem to be s...
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IPC IPC(8): G06F30/3308G06F17/16G06F17/11
CPCG06F30/3308G06F17/16G06F17/11
Inventor 陈婧蕊周振亚吴大可程明厚刘强
Owner 北京华大九天科技股份有限公司