Circuit design method, device, equipment and medium for improving code rate calculation efficiency
A technology of computational efficiency and circuit design, applied in the field of video coding and decoding, it can solve problems such as a large number of bit rate calculations and difficult hardware design, and achieve the effect of improving throughput and parallelism, and improving bit rate calculation efficiency.
Active Publication Date: 2021-12-03
杭州博雅鸿图视频技术有限公司
View PDF3 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
[0002] Rate-distortion optimization is a very important technology in the AVS3 video coding standard. It can effectively improve the performance of the encoder, but rate-distortion optimization requires a lot of bit rate calculations
In AVS3, entropy coding is used to obtain the code rate required for the rate-distortion optimization process. Due to the characteristics of entropy coding itself, the process has strong data dependence and is difficult to design hardware.
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0046] The following description and drawings illustrate specific embodiments of the invention sufficiently to enable those skilled in the art to practice them.
[0047] It should be clear that the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0048] When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the present invention. Rather, they are merely examples of systems and methods consistent with aspects of the invention as recited in the appended claims.
[0049] In the description of...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a circuit design method, device, equipment and medium for improving code rate calculation efficiency. The method includes: acquiring syntax elements in rate-distortion optimization, and dividing the syntax elements into two categories: residual coefficient information and header information; If the residual coefficient information is a coding unit greater than or equal to a preset threshold, calculate the sum of binarized string values according to a preset pipeline design scheme; if the residual coefficient information is a coding unit smaller than a preset threshold, then Calculate the sum of the bin string values after binarization according to the preset serial scheme; calculate the sum of the bin string values of the header information binarized according to the preset serial scheme; accumulate the sum of the bin string values of the two types of information , calculate the code rate according to the sum of the accumulated bin string values and the preset code rate estimation model. In this embodiment, a feasible hardware architecture is designed for the AVS3 code rate estimation algorithm to maximize the throughput and parallelism of the code rate estimation circuit.
Description
technical field [0001] The present invention relates to the technical field of video encoding and decoding, in particular to a circuit design method, device, equipment and medium for improving code rate calculation efficiency. Background technique [0002] Rate-distortion optimization is a very important technology in the AVS3 video coding standard. It can effectively improve the performance of the encoder, but rate-distortion optimization requires a lot of bit rate calculations. In AVS3, entropy coding is used to obtain the code rate required for the rate-distortion optimization process. Due to the characteristics of entropy coding itself, the process has strong data dependence and it is difficult to design hardware. In response to this situation, it is necessary to design a circuit for the code rate estimation in AVS3 to meet the real-time requirements. Contents of the invention [0003] Embodiments of the present disclosure provide a circuit design method, device, devi...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): H04N19/119H04N19/147H04N19/70
CPCH04N19/119H04N19/147H04N19/70
Inventor 张鹏胡文强向国庆严韫瑶宋磊
Owner 杭州博雅鸿图视频技术有限公司