Low-noise millimeter wave phase-locked loop frequency synthesizer based on time error amplifier

Abstract

The invention belongs to the field of digital-analog hybrid circuits, relates to a phase-locked loop frequency synthesizer structure, and particularly provides a low-noise millimeter wave phase-locked loop frequency synthesizer based on a time error amplifier, which is used for solving the problem that in-band noise of a phase-locked loop is deteriorated by a charge pump in a traditional charge pump phase-locked loop structure. On the basis of a traditional charge pump phase-locked loop frequency synthesizer structure, a primary time error amplifier (TA) is inserted between a phase frequency detector (PFD) and a charge pump (CP), the time error amplifier linearly amplifies a phase error signal output by the phase frequency detector by K times to generate a signal, and the signal is input into the charge pump; the noise contributed to the output end of the phase-locked loop frequency synthesizer by the charge pump is effectively reduced by K times, namely the problem that in-band noise of a phase-locked loop is deteriorated by the charge pump in a traditional charge pump phase-locked loop structure is solved; meanwhile, a frequency divider is reserved in a feedback loop, so that the frequency divider is compatible with the DSM technology, and the fractional frequency division function is completed.

Description

technical field [0001] The invention belongs to the field of digital-analog hybrid circuits, and relates to a phase-locked loop frequency synthesizer structure, in particular to a low-noise millimeter-wave phase-locked loop frequency synthesizer based on a time error amplifier. Background technique [0002] With the advent of 5G communication technology, wireless communication systems have higher and higher requirements on the noise performance of clock sources, and low-noise clock sources are prerequisites for various applications; and phase-locked loop frequency synthesizers are commonly used as clock sources in wireless communication systems , low-noise phase-locked loop frequency synthesizer has become the focus of research. [0003] At present, PLL frequency synthesizers mainly include traditional charge-pump PLL frequency synthesizers and sub-sampling PLL frequency synthesizers; among them, the sub-sampling PLL structure greatly promotes the in-band PLL However, since...

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Problems solved by technology

[0005] The purpose of the present invention is to provide a kind of low-noise millimeter-wave phase-locked loop frequency synthesizer based on the time error amplifier for the problem of poor noise performance of the traditional charge pump phase-locked loop frequency synthesizer. Detector, PFD) is inserted into the back end of a time error amplifier (Time Amplifier, TA) to overcome the problem that the charge pump (Charge Pump, CP) in the traditional charge pump phase-locked loop structure deteriorates the in-band noise of the phase-locked loop; at the same time, Keep the frequency divider in the feedback loop to be compatible with DSM technology and complete the fractional frequency division function

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