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Semiconductor package

A semiconductor and packaging technology, applied in the field of semiconductor packaging, can solve problems such as limiting instantaneous large current transmission, chip misoperation, etc., and achieve the effect of avoiding instantaneous voltage drop

Pending Publication Date: 2021-10-19
NAN YA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the DRAM chip needs a large instantaneous current during operation (for example, during high frequency operation), the gold wire under high frequency operation will form a large resistance, thereby limiting the transmission of the instantaneous large current
As a result, there will be a momentary voltage drop in the DRAM chip, which will eventually lead to the malfunction of the chip

Method used

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  • Semiconductor package

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Embodiment Construction

[0030] A number of implementations of the present invention will be disclosed below with the accompanying drawings. For the sake of clarity, many practical details will be described together in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some implementations of the present invention, these practical details are unnecessary, and thus should not be used to limit the present invention. In addition, for the sake of simplifying the drawings, some well-known and commonly used structures and elements will be shown in a simple and schematic manner in the drawings. In addition, for the convenience of readers, the sizes of the elements in the drawings are not shown in actual scale.

[0031] figure 1 A schematic side view of the semiconductor package 100 according to an embodiment of the present invention is shown. The semiconductor package 100 may include a first substrate 110 , a sec...

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Abstract

The invention discloses a semiconductor package. The semiconductor package includes a first substrate, a first semiconductor die, a second semiconductor die, a second substrate, at least one first solder ball, at least one second solder ball, and at least one third solder ball. The first semiconductor die is disposed on the first substrate. The second semiconductor die is disposed on the first semiconductor die. The second substrate is disposed on the second semiconductor die. The first solder ball is vertically between the first substrate and the first semiconductor die. The second solder ball is vertically between the second substrate and the second semiconductor die. The third solder ball is vertically between the first substrate and the second substrate.Thereby, the semiconductor package can perform its function well even when an instantaneous large current is required.

Description

technical field [0001] The content of the present invention relates to a semiconductor package. Background technique [0002] Dual-die packaging technology is widely used to package two integrated circuit chips into a single package module, so that the single package module can provide double the function or data storage capacity. Memory chips such as dynamic random access memory (DRAM) chips are usually packaged in this manner to allow a single packaged module to provide double the functionality or data storage capacity. In recent years, various two-chip packaging technologies have been developed and utilized in the semiconductor industry. [0003] In general, gold wires are widely used to transmit current from a power source to a DRAM chip. However, when the DRAM chip requires instantaneous large current during operation (for example, during high frequency operation), the gold wire under high frequency operation will form a large resistance, thereby limiting the transmis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/498H01L25/065
CPCH01L23/49811H01L23/49816H01L25/0657H01L2225/06517H01L2225/0652H01L2225/06548H01L2225/06586H01L2224/73253H01L2225/06558H01L2924/15331H01L2924/15321H01L2924/15192H01L23/5385H01L2225/06555
Inventor 杨吴德
Owner NAN YA TECH