Capacitor with high-dielectric-constant dielectric and thick electrode and fabrication method thereof
A manufacturing method and capacitor technology, applied in the field of capacitors, can solve problems such as the leakage current of electrodes 1104, and achieve the effect of preventing the increase of contact resistance
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
no. 1 example
[0111] image 3 The structure of a capacitor for a GB class DRAM according to the first embodiment of the present invention is shown.
[0112] image 3 In the present invention, an interlayer insulating layer 102 with a thickness of 500 nm is formed on the main surface of an n-type single crystal silicon (Si) substrate 101 having a resistivity of 0.01 Ωcm. SiO 2 It has a contact hole 115 filled with a contact plug 103 made of phosphorus-doped polysilicon. The bottom surface of the contact plug 103 is in contact with and electrically connected to the substrate 101 , and the top of the contact plug 103 is exposed from the interlayer insulating layer 102 .
[0113] although image 3 Not shown in the middle, a diffusion region is generally formed in the substrate 101, and a contact plug 103 is in contact with and electrically connected to the diffusion region.
[0114] A bottom electrode 104 with a thickness of 400 nm is formed on the interlayer insulating layer 102 and is in co...
no. 2 example
[0146] Figure 7 The configuration of a capacitor for a GB class DRAM according to a second embodiment of the present invention is shown.
[0147] The capacitor according to the second embodiment of the present invention has the same structure as the first embodiment except that the thickness of the portion 102a of the interlayer insulating layer 102 is thicker than that of the rest of the layer 102. A portion 102 a of the interlayer insulating layer 102 surrounds the contact plug 103 and is located just below the lower electrode 104 . A portion 102a of the interlayer insulating layer 102 is 500 nm thick and the rest of the interlayer insulating layer 102 is 300 nm thick.
[0148] The capacitor according to the second embodiment was manufactured in the following manner.
[0149] First, use the Figures 4A to 4D Made by the same process steps Figure 8A structure shown.
[0150] After that, if Figure 8B As shown, using the insulating cap layer 105 as a mask, the interlay...
no. 3 example
[0159] Figure 11A The structure of a capacitor for a GB class DRAM according to a third embodiment of the present invention is shown.
[0160] The structure of the capacitor according to the third embodiment is the same as that of the capacitor according to the first embodiment, except that a diffusion barrier layer 110a is additionally formed between the polysilicon contact plug 103 and the lower electrode 104 . The diffusion barrier layer 110 a is located in the contact hole 115 of the interlayer insulating layer 102 .
[0161] Obviously, there are the same advantages as the first embodiment.
[0162] Also, the diffusion barrier layer 110 a prevents silicon atoms contained in the polysilicon contact plug 103 from diffusing into the lower electrode 104 . As a result, an additional advantage is that defects due to silicon diffusion can be prevented.
PUM
| Property | Measurement | Unit |
|---|---|---|
| Leakage current density | aaaaa | aaaaa |
| Leakage current density | aaaaa | aaaaa |
| Leakage current | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More 