Bandwidth allocation device and method
A bandwidth allocation and bandwidth technology, which is applied in electrical digital data processing, wireless communication, instruments, etc., can solve problems such as incompatible design of bandwidth utilization, and achieve the effect of low cost and high bandwidth utilization
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Embodiment 1
[0071] Embodiment 1: Configure 8 ports with a bandwidth of 200G.
[0072] When configuring 8 ports with a bandwidth of 200G, that is figure 2 The output bandwidth to be allocated for each output port of the MAC 10 is 400G, and the output bandwidth of ports Port1-Port8 is 200G. Combine below figure 2 and Table 1 illustrate this embodiment.
[0073] figure 2 A schematic diagram of a working mode of a bandwidth allocation device is provided for the present invention. Table 1 is a table of a working mode of the PHY. from figure 2 As can be seen from Table 1, the first output port of the MAC 10 outputs 200G bandwidth to be allocated to the host-side serial bus channels H0-H3 of the first PHY and the host-side serial bus channels H8-H11 of the first PHY respectively; The second output port of MAC 10 outputs 200G bandwidth to be allocated to the host-side serial bus channels H4-H7 of the first PHY and the host-side serial bus channels H0-H3 of the second PHY2 respectively; ...
Embodiment 2
[0078] Embodiment 2: Configure four ports with a bandwidth of 400G.
[0079] When configuring 4 ports with a bandwidth of 400G, that is image 3 The to-be-allocated bandwidth output by each output port of the MAC 10 is 400G, and the output bandwidth of ports Port1, Port2, Port6, and Port7 is 400G. Combine below image 3 and Table 2 illustrate this embodiment.
[0080] image 3 A schematic diagram of another working mode of the bandwidth allocation device is provided for the present invention. Table 2 is a table of another working mode of the PHY. The working process of the MAC 10 is the same as that of Embodiment 1 above, and will not be repeated here.
[0081] from image 3 It can be seen from Table 2 that the CPU 30 respectively controls the path conduction between the host-side serial bus channels H0-H3 of the first PHY and the line-side serial bus channels L0-L3, and the host-side serial bus channels of the first PHY The path between the row bus channels H4-H7 and t...
Embodiment 3
[0085] Embodiment 3: Configure two ports with a bandwidth of 400G and four ports with a bandwidth of 200G.
[0086] When configuring two ports with a bandwidth of 400G and four ports with a bandwidth of 200G, that is Figure 4 The output bandwidth to be allocated for each output port of the MAC 10 is 400G, the output bandwidth of ports Port1 and Port2 is 400G, and the output bandwidth of Port5, Port6, Port7, and Port7 is 200G. Combine below Figure 4 and Table 3 illustrate this embodiment.
[0087] Figure 4 A schematic diagram of another working mode of the bandwidth allocation device is provided for the present invention. Table 3 is a table of another working mode of the PHY. The working process of the MAC 10 is the same as that of Embodiment 1 above, and will not be repeated here.
[0088] The CPU 30 respectively controls the conduction of the paths between the host-side serial bus channels H0-H3 of the first PHY 20 and the line-side serial bus channels L0-L3, and the ...
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