Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Multi-core chip and communication method thereof

A chip and multi-core technology, applied in inter-program communication, multi-program device, instrument, etc., can solve the problems of high power consumption, large shared storage space, etc.

Pending Publication Date: 2022-01-04
HUNAN ADVANCECHIP ELECTRONICS TECH CO LTD
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this exclusive memory allocation method needs to use a large shared storage space. Therefore, the traditional multi-core chip has the disadvantage of high power consumption.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Multi-core chip and communication method thereof
  • Multi-core chip and communication method thereof
  • Multi-core chip and communication method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0037] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the specification of the application are only for the purpose of describing specific embodiments, and are not intended to limit the application.

[0039] It can be understood that the terms "first", "second" and the like used in this application may be used to describe various elements herein, but these elements are not limited by these terms. ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a multi-core chip and a communication method thereof. The multi-core chip comprises at least two cores, core reading devices, a shared storage device, an inter-core arbitration device, an intra-core arbitration device and an interface device, wherein the number of the core reading devices corresponds to that of the cores; the interface device is connected with the intra-core arbitration device and the upper computer; the core reading device is connected with the shared storage device and the corresponding kernel; the inter-core arbitration device is connected with each core; and the intra-core arbitration device is connected with each core, the interface device and the shared storage device. The inter-core arbitration device is used for performing access control according to an inter-core interaction instruction time sequence during data interaction of different cores; and the intra-core arbitration device is used for arbitrating a time sequence of a related instruction when the multi-core chip interacts data with the upper computer, and determining a communication link based on an arbitration result. According to the multi-core chip, through cooperation of different devices, ordered access of the shared storage space can be achieved, the size of the shared storage device can be reduced, and power consumption is reduced.

Description

technical field [0001] The present application relates to the technical field of multi-core chips, in particular to a multi-core chip and a communication method thereof. Background technique [0002] A multi-core chip is a chip that contains two or more cores, and the same task can be decomposed into threads or processes of multiple cores to run in parallel. Multi-core chips usually adopt the design method of multi-core shared memory. [0003] Traditional multi-core chips allocate different address spaces in the shared storage to different cores, and set the MMU (Memory Management Unit) inside the core to restrict each core to only access its own address space to avoid the occurrence of Access to competition. However, this exclusive memory allocation method needs to use a large shared storage space, so the traditional multi-core chip has the disadvantage of high power consumption. Contents of the invention [0004] Based on this, it is necessary to provide a multi-core ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F9/54
CPCG06F9/545G06F9/546
Inventor 张巍易峰吴修英吴顺锋古小琴
Owner HUNAN ADVANCECHIP ELECTRONICS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com