Driving control method for parallel connection of double MOS (Metal Oxide Semiconductor) transistors
A MOS tube and drive control technology, which is applied in the field of power switch drive control, can solve the problems of large switching loss, increase switching loss of dual MOS tubes, reduce on-resistance of MOS tubes, etc., and achieve the effect of reducing switching loss.
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Embodiment 1
[0022] Such as figure 1 In the parallel connection structure of double NMOS transistors shown, the introduction of this embodiment is carried out with the CSD18502Q5B model N-channel MOS transistor of TI Company. Both NMOS1 and NMOS2 connected in parallel adopt CSD18502Q5B, and the sources and drains of the two MOS transistors are connected. The gate of the second MOS transistor performs input drive control.
[0023] The driving control method specifically includes:
[0024] First, determine the turn-on time of NMOS1 and the turn-off time of NMOS2. Since the models of the two MOS tubes are the same in this embodiment, the turn-on time and turn-off time are the same. According to the switching characteristics of the CSD18502Q5B product, this embodiment determines the turn-on interval T1 as 10ns, the turn-off interval is 30ns;
[0025] refer to figure 2 As shown, when it is necessary to turn on and drive the double-parallel MOS transistors, the first MOS transistor NMOS1 is...
Embodiment 2
[0030] For the situation of dual P-channel MOS transistors connected in parallel, the drive control method of the present invention also adopts the drive control method of "controlling one of the MOS transistors to be in the fully conducting state of the other MOS transistor when it is turned on and completely turned off" For ideas, the timing coordination of the two drive control signals G1 and G2 can be found in image 3 , is determined according to the breaking characteristics of the PMOS transistors, wherein the turn-on time interval and the conduction time interval of the two MOS transistors are determined according to the breaking characteristics of the specific PMOS transistor model, and will not be described in detail.
[0031] To sum up the above embodiments, the present invention can further reduce the large switching loss caused by the superimposition of voltage and current changes during turn-on and turn-off on the basis of reducing the conduction loss by connecting...
PUM
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