Method and system for verifying debug function of RISCV architecture
A function verification and function technology, applied in the CPU field, can solve complex problems and achieve the effect of simple positioning problems, short verification cycle and wide coverage
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Embodiment 1
[0056] This embodiment provides a RISCV architecture debug function verification method, including the following steps:
[0057] S1 initialization, use the simulation tool to compile Testbench, and generate the simulation execution file;
[0058] S2 uses RISCV Toolchain to compile the CPU testcase and convert it into a hex file for Testbench to load on the DUT CPU;
[0059] S3 uses host toolchain to compile c model and model test to get .so dynamic library;
[0060] S4 runs the simulation execution file, and passes the hex file and so library file through parameters to realize the simulation execution file loading;
[0061] Finally, S5 completed the verification of the Debug function of the RISCV architecture through model test and DUT CPU test.
[0062] In this embodiment, the debug verification method in the riscv-tests toolkit is used in the prior art. It is a complete verification method combined with gdb, openocd, testbench, and DUT (Design Under Test). This method is...
Embodiment 2
[0066] In terms of specific implementation, this embodiment provides an implementation of JTAG Driver. JTAGDriver is defined as a system Verilog module, the input is clock, reset, jtag_TDI; the output is jtag_TCK, jtag_TMS, jtag_TDI, jtag_TRSTn. Declare the dpi function jtag_plugin_tick inside the module, and call the jtag_plugin_tick function when each jtagclock clock cycle arrives. The implementation of this function is in the JTAG Model of c modeldomain.
[0067] This embodiment also provides an implementation of the C model. It can be seen from the implementation of the JTAG Driver that each jtagclock will call the jtag_plugin_tick function once, and the jtag_plugin_tick function is called actively by the JTAG Driver end and passively executed by the C model end. From the whole design, it is hoped that the c model will actively execute and control the JTAG Driver through jtag. Therefore, the JTAG Model of the C model is designed as a multi-threaded program.
Embodiment 3
[0069] On the basis of embodiment 2, with reference to image 3 As shown, this embodiment provides a flow of the main thread function jtag_plugin_tick function, specifically as follows:
[0070] The Jtag_plugin_tick function comes in to first judge whether g_thread is null. If it is null, it means that it is called for the first time, and creates sem_wr and sem_rd semaphores for inter-thread synchronization, and then calls pthread_create to create g_thread sub-threads. If g_thread is not null, it means that child threads have been created.
[0071] Then judge whether the end flag is 1. If the end flag is 1, it means that the model test thinks that the use case can be ended. At this time, test_finish is called to end the simulation. Continue if the end flag is 0.
[0072] Waiting for the sem_wr semaphore, that is, waiting for the child thread to prepare the data that jtag needs to happen. This function will wait until the child thread has data to be generated before returnin...
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