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A Data Processing System for Segmentation of Very Large-Scale Circuit Design

A data processing system and circuit design technology, applied in the computer field, can solve problems such as EDA software performance degradation, and achieve the effect of improving import performance and wide use value

Active Publication Date: 2022-05-20
北京云枢创新软件技术有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the existing technology, when the EDA software handles the import of ultra-large-scale circuit design data, it usually directly imports the third-party design data. Due to the huge amount of data and some data that does not need to be imported into the DEA software, if the third-party If a large amount of design data enters the DEA software, the performance of the EDA software will be severely degraded

Method used

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  • A Data Processing System for Segmentation of Very Large-Scale Circuit Design
  • A Data Processing System for Segmentation of Very Large-Scale Circuit Design
  • A Data Processing System for Segmentation of Very Large-Scale Circuit Design

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Embodiment Construction

[0017] In order to further explain the technical means and effects of the present invention to achieve the intended purpose of the invention, the following is a specific implementation of a data processing system for ultra-large-scale circuit design segmentation proposed according to the present invention in conjunction with the accompanying drawings and preferred embodiments. The method and its effect are described in detail below.

[0018] Embodiments of the present invention provide a data processing system for design segmentation of ultra-large-scale circuits, such as figure 1 As shown, it includes a preset pin (pin) data structure, a preset weight mapping table, a processor and a memory storing a computer program, and the pin data structure includes a pin identification data segment and at least one pin parameter The data segment, the pin parameter data segment includes the pin level identification data segment and the pin pad (pad) parameter data segment corresponding to...

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PUM

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Abstract

The present invention relates to a data processing system designed for ultra-large-scale circuit design segmentation, including a preset pin data structure, a preset weight mapping table, and a processor. The pin data structure includes a pin identification data segment and at least one A pin parameter data segment, the pin parameter data segment includes a pin level identification data segment and a pin pad parameter data segment corresponding to the pin at this level; the weight mapping table includes a pre-configured pin pad The mapping relationship between parameters and levels and corresponding weight values. The invention divides the circuit design of the third party based on the pin parameters, imports the divided electronic design data into EDA software in parallel, and improves the data import performance of the EDA software.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to a data processing system for design division of ultra-large-scale circuits. Background technique [0002] Electronic design automation (Electronic design automation, abbreviation: EDA) refers to the use of computer-aided design (CAD) software to complete the functional design, synthesis, verification, and physical design (including layout, wiring, and layout) of VLSI chips. , design rule checking, etc.) and other process design methods. In the existing technology, when the EDA software handles the import of ultra-large-scale circuit design data, it usually directly imports the third-party design data. Due to the huge amount of data and some data that does not need to be imported into the DEA software, if the third-party If a large amount of design data enters the DEA software, the performance of the EDA software will be severely degraded. It can be seen that how to improve th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/39
Inventor 陈峰敬伟
Owner 北京云枢创新软件技术有限公司
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