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Fast phase locking method for phase-locked loop

A phase-locked loop and phase-locked technology, applied in the field of phase-locked loops, can solve problems such as long locking and calibration time

Active Publication Date: 2022-04-26
北京力通通信有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a kind of fast phase-locking method of phase-locked loop, has solved the technical problem that the locking calibration time of existing phase-locked loop is too long

Method used

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  • Fast phase locking method for phase-locked loop

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Experimental program
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Effect test

Embodiment 1

[0051] Embodiment 1, the method of storing the calibration results of the voltage-controlled oscillator in advance reduces the impact of the calibration time on the locking time. Step 1 also includes analyzing the relationship between the locking time of the phase-locked loop and the loop bandwidth, and the phase-domain closed-loop of the frequency synthesizer The transfer function is:

[0052]

[0053] Calculated with a third-order loop filter

[0054] T2=R2·C2.

[0055] Where A2=C1·C2·C3·R2·R3, A1=C2·R2·(C1+C3)+C3·R3,

[0056]A0=C1+C2+C3, then the closed-loop transfer function can be organized as:

[0057]

[0058] in When the coefficient of the high-order item is much smaller than the coefficient of the low-order item, (according to the initial value theory, the above assumptions will only affect some initial characteristics of the system, such as overshoot, and have little effect on the locking time) the formula is simplified to a second-order expression:

...

Embodiment 2

[0077] Embodiment 2 a reference phase-locked loop (PLL) configured to provide the target signal; and a controller configured to calibrate the reference phase-locked loop such that when the communication device transitions from the first mode of operation to the second mode of operation, The target signal tracks a reference signal; wherein the controller is further configured to calibrate the reference phase-locked loop by adjusting the target frequency by a predetermined amount, the predetermined amount representing a predicted tuning signal offset, the tuning signal An offset is caused by a transition between said first mode of operation being a receive mode of operation and said second mode of operation being a transmit mode of operation. Preferably said reference phase locked loop comprises: a voltage controlled oscillator (VCO) configured to provide said target signal in response to a tuning signal; wherein a controller module is configured to couple said predetermined amou...

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Abstract

The invention discloses a fast phase locking method for a phase-locked loop, and relates to the technical field of phase-locked loops. The method comprises the following steps: step 1, calibrating several frequency points before the phase-locked loop works, storing capacitance control words corresponding to the several frequency points, when the output frequency of the phase-locked loop needs to be changed to a target value, firstly reading the capacitance array control words corresponding to the frequency points, then controlling the phase-locked loop to enter a closed loop state, and finally changing the output frequency of the phase-locked loop to a target value; starting a normal locking process; and step 2, capacitance calibration of the voltage-controlled oscillator is carried out, and a topological structure of the LC voltage-controlled oscillator is adopted. The loop bandwidth of the phase-locked loop is 310KHz, the phase margin is 51 degrees, in the locking process of the phase-locked loop, within 10us, the control voltage of the phase-locked loop is stable, the phase-locked loop is locked, and if the time for reading the calibration result of the capacitor array and the influence of different processes, temperatures and voltages are included, the design can meet the locking time lt; and 25us can be satisfied.

Description

technical field [0001] The invention belongs to the technical field of phase-locked loops, in particular to a fast phase-locking method of a phase-locked loop. Background technique [0002] This design requires that the locking time of the phase-locked loop is <25us. This requirement is more stringent if the calibration time of the VCO capacitor array is taken into account. [0003] The capacitor array calibration in the voltage controlled oscillator needs to use the reference clock to open a time window, and count the output signal of the voltage controlled oscillator in this clock window, so as to calculate the oscillation frequency of the voltage controlled oscillator. According to the difference between the oscillation frequency and the target oscillation frequency, adjust the capacitance control word of the capacitor array accordingly, and then continue to calculate the oscillation frequency and adjust the capacitance control word until the capacitance control word ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/093H03L7/099H03L7/18
CPCH03L7/093H03L7/099H03L7/18
Inventor 侯卫兵雷伟龙
Owner 北京力通通信有限公司
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