SRAM (Static Random Access Memory) storage circuit based on polarity strengthening technology

Abstract

The invention discloses an SRAM (Static Random Access Memory) storage circuit based on a polarity strengthening technology, which comprises four PMOS (P-channel Metal Oxide Semiconductor) transistors and ten NMOS (N-channel Metal Oxide Semiconductor) transistors, the PMOS transistors P1 and P2 are used as pull-up tubes, and the PMOS transistors P3 and P4 are cross-coupled; the NMOS transistors N3, N4, N5 and N6 serve as pull-down tubes, and the NMOS transistors N5 and N6 are in cross coupling; the main storage nodes Q and QN are respectively connected with the bit lines BL and BLB through NMOS transistors N7 and N8, and the redundant storage nodes S0 and S1 are respectively connected with the bit lines BL and BLB through NMOS transistors N9 and N10; the bit line BL is electrically connected with the source electrodes of the NMOS transistors N7 and N9, and the bit line BLB is electrically connected with the source electrodes of the NMOS transistors N8 and N10. The storage circuit with the structure can improve the writing speed of the storage unit, reduce the power consumption of the unit and improve the SEU (Single Event Upset) resistance of the unit.

Description

technical field [0001] The invention relates to the technical field of integrated circuit design, in particular to an SRAM storage circuit based on polarity reinforcement technology. Background technique [0002] With the advancement of science and technology, Static Random Access Memory (SRAM) has been widely used in various aerospace electronics fields. Due to the increasing integration level, SRAM is affected by Single Event Effects (Single Event Effects, SET), resulting in single The probability of particle upset (Single Event Upset, SEU) is getting higher and higher. Single event upset is a major reliability failure mechanism that can cause electronic system failure by temporarily changing stored values. When charged particles hit sensitive nodes of integrated circuits When , the induced charge along its path can be effectively collected and accumulated through the drift process, once the transient voltage pulse generated by the accumulated charge is higher than the swi...

AI Technical Summary

Problems solved by technology

[0003] Today's anti-SEU has become a problem that researchers cannot ignore, and the existing technology lacks corresponding solutions

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