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USB2.0 protocol five-bit cyclic redundancy check method, device and equipment

A cyclic redundancy check, five-bit technology, applied in the field of five-bit cyclic redundancy check of the USB2.0 protocol, can solve the problems of long time consumption, many iterations, large hardware delay of redundancy check code, etc., and achieve The effect of reducing hardware latency

Pending Publication Date: 2022-05-20
络源(上海)半导体科技有限公司
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Problems solved by technology

[0006] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment, which are used to solve the problem of large number of iterations, long time-consuming, redundant The problem of large hardware delays in the generation of residual check codes and result verification

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  • USB2.0 protocol five-bit cyclic redundancy check method, device and equipment
  • USB2.0 protocol five-bit cyclic redundancy check method, device and equipment
  • USB2.0 protocol five-bit cyclic redundancy check method, device and equipment

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[0027] Embodiments of the present application are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. The present application can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.

[0028] It should be noted that the diagrams provided in the following embodiments are only schematically illustrating the basic idea of ​​the application, and only the components related to the application are shown in the diagrams rather than the number, shape and Dimensional drawing,...

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Abstract

The invention provides a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment, and the method comprises the steps: carrying out the CRC-5 calculation of an address and an endpoint number in a token package at a transmitting end, integrating a calculation result with a PID, the address and the endpoint number to form a complete token package, and transmitting the complete token package; and receiving the token packet sent by the sending end at the receiving end, and performing CRC-5 calculation and verification on the second byte and the third byte of the token packet. Through data bit width expansion and redundant item elimination, hardware delay is effectively reduced, and a system can work at a higher frequency.

Description

technical field [0001] This application relates to the technical field of USB transmission. In particular, it relates to a USB2.0 protocol five-bit cyclic redundancy check method, device and equipment. Background technique [0002] The USB2.0 standard protocol is the most widely used in the market, and supports a maximum transmission rate of 480Mbps. There are mainly three operating modes: High Speed, Full Speed ​​and Low Speed. [0003] The currently commonly used cyclic redundancy check code (CRC, Cyclic Redundancy Check) is the most commonly used error checking code in the field of data communication, and its feature is that the lengths of the information field and the check field can be selected arbitrarily. Cyclic Redundancy Check (CRC) is a data transmission error detection function. It performs polynomial calculation on the data and attaches the result to the data. The receiving device uses the same algorithm to calculate the received data and compares the result wit...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00H04L9/32H04L9/40
CPCH04L1/0061H04L9/3213H04L63/12H04L1/0041H04L1/0045Y02D10/00
Inventor 张德俊
Owner 络源(上海)半导体科技有限公司
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