Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which comprises a substrate and fin parts located on the substrate, the substrate comprises device regions and isolation regions located between the adjacent device regions in the extension direction of the fin parts, and gate structures are formed on the substrate of the device regions and the isolation regions; the gate structure stretches across the fin part and covers part of the top and part of the side wall of the fin part, source-drain doping layers are formed in the fin parts on the two sides of the gate structure, an interlayer dielectric layer is formed on the substrate exposed out of the gate structure, and the interlayer dielectric layer covers the side wall of the gate structure; in the device region, source and drain plugs are formed in the interlayer dielectric layer on the two sides of the gate structure, and the source and drain plugs are electrically connected with the source and drain doping layers; after the source and drain plugs are formed, in the isolation region, removing the gate structure and a part of thickness of the substrate located below the gate structure, and forming an isolation groove defined by the source and drain plugs and the remaining substrate; and forming an isolation structure in the isolation groove. And the probability of bridging of source and drain plugs in adjacent device regions is reduced.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length is correspondingly shortened. However, with the shortening of the channel length of the device, the distance between the source electrode and the drain electrode of the device is also shortened, so the control ability of the gate structure to the channel becomes worse, and the gate voltage pinch off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects), more likely to...

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Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur

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