Trenched semiconductor device and method of fabricating the same
A technology of semiconductor and groove type, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve problems such as deterioration of oxide film characteristics and reliability, deterioration of gate oxide film characteristics or reliability, etc.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0061] 1 to 6 are diagrams for explaining the manufacturing method and structure of the semiconductor device having the trench structure according to the first embodiment of the present invention. Hereinafter, as a semiconductor device, an IGBT having a trench MOS gate structure will be described as an example.
[0062] First, the manufacturing method will be described, and then the structure will be described.
[0063] Fig. 1(a) to Fig. 6(b) are diagrams of cross-sections of grooves in each manufacturing process, and correspond to those already described in conventional examples. Figure 16 (a) The cross section of the B-B' line of the groove plan view. Because there is a restriction that different figure numbers must be attached to each page of the drawing, it is shown that Figure 2(a) follows Figure 1(d), 3(a) follows Figure 2(d), and 4(a) follows 3(d), 5(a) follow the series of steps in Fig. 5(d) following Fig. 4(d), 6(a).
[0064] First, in the semiconductor substrate 3...
Embodiment 2
[0093] Figure 7~ Figure 9 It is a figure for explaining the manufacturing method and structure of the semiconductor device which has a trench structure in Example 2 of this invention. Since the steps up to FIG. 7 are the same as those in FIGS. 1 to 2 of Embodiment 1, FIGS. 1 to 2 of Embodiment 1 are cited.
[0094] First, the manufacturing method will be described, and then its structure will be described.
[0095] Regarding the manufacturing method, first, the same steps as those shown in FIGS. 1 to 2 are performed.
[0096] Secondly, as shown in Fig. 7(a), after the groove etching or after the groove etching post-treatment, inject concentration ratio n to the bottom of the groove - Type zone 1 high arsenic, n - Type region 1 is located lower than p base layer 4 .
[0097] Next, as shown in FIG. 7( b ), a silicon oxide film 11 (insulating film) is formed on the entire surface from the inner wall to the outer surface of the groove 7 . This film becomes a gate oxide film....
Embodiment 3
[0112] Figure 10 It is a figure for explaining the structure of the semiconductor device of Example 3 of this invention. also, Figure 11 with Figure 12 is a diagram for explaining the operation of the semiconductor device of this embodiment.
[0113] Figure 10 (a) is an example of the semiconductor device of this embodiment, which is the same conceptual structure as the groove MOS gate structure shown in Embodiment 2, but the gate insulating film 11 extends from the groove opening to the outer surface of the groove, and the gate 12 protrudes from groove 7 while extending to the outer surface by the same length as gate oxide film 11 .
[0114] also, Figure 10 (b) is another example of the semiconductor device of the present embodiment. The structure of the groove-type MOS gate structure shown in Embodiment 2 is continuous between adjacent grooves without separating the gate insulating film 11, and It is also continuous without separating the grid 12 . The symbols in...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More